An array substrate, a method for manufacturing the same and a display device are provided. The method includes: providing a base substrate; forming a conductive material thin film on the base substrate; forming a first photoresist layer on a side of the conductive material thin film distal to the base substrate; etching the conductive material thin film by using the first photoresist layer as a mask to obtain a first etched pattern; removing third covering portions of the first photoresist layer to obtain a second photoresist layer; and etching the first etched pattern by using the second photoresist layer as a mask to obtain a gate electrode and a signal line.

A display device includes: a substrate including first and second light-blocking areas, and a pixel area; a light-blocking pattern at least partially at the first light-blocking area; a data line at the second light-blocking area; a first insulating layer on the light-blocking pattern and the data line; a semiconductor layer on the first insulating layer and overlapping the light-blocking pattern on a plane; a second insulating layer on the semiconductor layer; a color filter on the second insulating layer at least partially at the pixel area; a third insulating layer on the second insulating layer and the color filter; a gate line on the third insulating layer at the first light-blocking area; a pixel electrode at least partially at the pixel area; and a bridge electrode at least partially at the first light-blocking area. The second and third insulating layers directly contact one another over the semiconductor layer.

The present invention discloses a mask, a manufacturing method thereof and a manufacturing method of a thin film transistor. The mask includes: a first substrate and phase shift patterns formed above the first substrate, wherein an opening area is formed between the adjacent phase shift patterns and a halftone pattern is formed at positions corresponding to the phase shift patterns and the opening area. In the present invention, when an active layer pattern, a source and a drain are formed through one patterning process by using the mask, the design of narrow channel of the thin film transistor can be realized. As the width of the channel region of the thin film transistor becomes narrow, the volume of the thin film transistor can be effectively reduced, and the super-miniaturization of the thin film transistor can be achieved.

The present invention provides an array substrate fabricating method. The array substrate fabricating method comprises the steps of: forming a semiconductor material layer and a first photoresist layer on a substrate successively, forming a pattern of an active layer comprising thin film transistors by using the semiconductor material layer and the first photoresist layer through photoetching technology, and reserving the first photoresist layer at least on conductive areas of the active layer when the thin film transistors are turned on; and forming a first material layer on the substrate on which the active layer is formed and the first photoresist layer is reserved on the active layer, and forming a pattern comprising first structures by using the first material layer through the photoetching technology. The method is adapted for fabricating an array substrate using metal oxide thin film transistors.

A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor.

It is an object of the present invention to form a pixel electrode and a metal film using one resist mask in manufacturing a stacked structure by forming the metal film over the pixel electrode. A conductive film to be a pixel electrode and a metal film are stacked. A resist pattern having a thick region and a region thinner than the thick region is formed over the metal film using an exposure mask having a semi light-transmitting portion. The pixel electrode, and the metal film formed over part of the pixel electrode to be in contact therewith are formed using the resist pattern. Accordingly, a pixel electrode and a metal film can be formed using one resist mask.

A display device and a method for manufacturing the same having a thin film transistor (TFT) including a gate connected to a gate line, a drain connected to a data line, and a source connected to a pixel electrode and a passivation layer only in an opening of a pixel and a peripheral area of the TFT. The pixel electrode directly contacts the source of the TFT and overlaps the gate of the TFT.

Disclosed is a method for manufacturing a TFT substrate, which uses one partial transmitting mask to form patterns of an active layer, a gate insulation layer, and a gate electrode through photolithography such that the entire process for manufacturing TFT substrate can be completely conducted by using only three masks. Compared to the prior art, one mask is save so that the operation is simplified and the manufacturing cost is reduced.

An object is to reduce a capacitance value of parasitic capacitance without decreasing driving capability of a transistor in a semiconductor device such as an active matrix display device. Further, another object is to provide a semiconductor device in which the capacitance value of the parasitic capacitance was reduced, at low cost. An insulating layer other than a gate insulating layer is provided between a wiring which is formed of the same material layer as a gate electrode of the transistor and a wiring which is formed of the same material layer as a source electrode or a drain electrode.

There is provided a method of patterning a stack of layers defining one or more electronic device elements, comprising: creating a first thickness profile in an uppermost portion of the stack of layers by laser ablation; and etching the stack of layers to translate the first thickness profile into a second thickness profile at a lower level; wherein the etching reduces the thickness of said uppermost portion of the stack and one or more lower layers of the stack under said uppermost portion.