H01L27/1296

Laser annealing apparatus, and fabrication methods of polycrystalline silicon thin film and thin film transistor

A laser annealing apparatus, a fabrication method of a polysilicon thin film, and a fabrication method of a thin film transistor are provided. The laser annealing apparatus includes: a laser generator, an optical system and an annealing chamber. The laser generator is configured to emit a laser beam, and the laser beam is guided to the annealing chamber via the optical system. The optical system includes a beam splitter, the beam splitter decomposes the laser beam into a first beam and a second beam, an energy density of the first beam is greater than an energy density of the second beam, and the first beam and the second beam are guided into the annealing chamber for laser annealing.

Method of manufacturing a transistor
10868147 · 2020-12-15 · ·

A method of forming a transistor from a stack of layers comprising at least one insulating layer topped by at least one active layer and at least one first and one second insulating trench defining in the active layer a reception area for receiving the transistor, the transistor comprising a conduction channel formed at least partially in the active layer, the method comprising at least the following steps: forming a grid stack extending over at least the conduction channel; forming a source zone and a drain zone; wherein the formation of the grid stack is carried out in such a way as to provide at least a first and a second portion of the reception zone, not covered by the grid stack.

Array substrate, preparation method thereof and display panel

The present disclosure relates to array substrate, preparation method thereof and display panel. An array substrate comprises: a first thin film transistor and a second thin film transistor over a substrate; wherein the first thin film transistor comprises a first portion of a first insulating layer, the first insulating layer comprises a first recess corresponding to the second thin film transistor, and the second thin film transistor is located in the first recess; and wherein a thickness of a second portion of the first insulating layer, which is below the bottom of the first recess, is smaller than that of the first portion of the first insulating layer.

Semiconductor device, method of manufacturing semiconductor device, and display unit
10811445 · 2020-10-20 · ·

A semiconductor device includes a substrate. The semiconductor device further includes a first transistor. The first transistor includes a first semiconductor layer over the substrate, the first semiconductor layer including poly-silicon. The first transistor further includes a first gate electrode over the first semiconductor layer, the first gate electrode facing the first semiconductor layer. The semiconductor device further includes a second transistor. The second transistor includes a second semiconductor layer over the substrate, the second semiconductor layer including an oxide semiconductor. The second transistor further includes a second gate electrode over the second semiconductor layer, the second gate electrode facing the second semiconductor layer.

Array substrate and manufacturing method therefor, display panel, display device

Disclosed are an array substrate and a manufacturing method therefor, a display panel and a display device, which are used for enabling a viewer to see a uniform reflective effect at various viewing angles, improving the display effect. The array substrate manufacturing method comprises: sequentially forming, on a passivation layer, a reflective layer and a transparent conductive layer, the reflective layer being electrically connected, by means of a via hole penetrating through the passivation layer, to a source electrode or a drain electrode of the thin film transistor, and the transparent conductive layer comprising several metal ions; performing reduction process on the transparent conductive layer, so that the metal ions are reduced, and a metal particle layer is formed; and performing patterning process on the transparent conductive layer and the reflective layer on which the steps above are completed, so as to form a pixel electrode.

Display panel and display apparatus

The present application discloses a display panel and a display device apparatus. The display panel includes a substrate, the substrate includes a plurality of pixel regions; an active switch, a plurality of active switches disposed on the substrate, wherein the pixel regions are disposed on the active switches, the active switches are corresponding to each of the pixel regions, respectively, and each of the active switch includes: an insulating layer, the insulating layer includes at least two thin film layers, the thin film layers are formed by chemical vapor deposition process with a predetermined thickness.

Array substrate manufacturing method thereof and display device

An array substrate, a method for manufacturing an array substrate and a display device are provided. The array substrate includes: a base substrate, and an insulating layer, a gate line, a source electrode, a drain electrode, and a data line on the base substrate. The insulating layer includes a light transmission portion and a light shielding portion, and orthographic projections of the gate line, the source electrode, the drain electrode, and the data line on the base substrate are all within an orthographic projection of the light shielding portion on the base substrate.

MANUFACTURING METHOD OF DISPLAY SUBSTRATE, ARRAY SUBSTRATE AND DISPLAY DEVICE
20200312881 · 2020-10-01 ·

A manufacturing method of a display substrate, an array substrate and a display device are provided. The method includes forming a first wire, a first insulation layer, a first and second metal layer, and a photoresist layer; forming a photoresist retained pattern above the first wire; forming a second and first metal layer retained pattern under the photoresist retained pattern; forming a second insulation layer with a thickness less than or equal to a sum of thicknesses of the first and second metal layer; the second insulation layer forming a fracture region at a boundary between a part covering the first insulation layer and another part covering the second metal layer retained pattern; removing the first and second metal layer retained patterns by a wet etch process to expose the first insulation layer; and forming a contact hole exposing the first wire.

ARRAY SUBSTRATE OF THIN-FILM TRANSISTOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

Disclosed are an array substrate of a thin-film transistor liquid crystal display device and a method for manufacturing the same. The array substrate includes a plurality of data lines, a plurality of dummy data lines, a plurality of first gate lines, a plurality of second gate lines, and a plurality of groups of pixel units. Each group of pixel units includes an odd-numbered column of first thin film transistors and an even-numbered column of second thin film transistors. First ends and second ends of the dummy data lines are connected respectively to two common voltage electrode lines, which are arranged on the substrate in a transverse direction. The method includes steps of: forming a plurality of gate lines and two common voltage electrode lines; forming a source, a drain, and a plurality of data lines; and forming a plurality of pixel electrodes and a plurality of dummy data lines. A light shielding electrode line provided has good voltage driving uniformity.

Active switch array substrate and method for manufacturing the same

The present disclosure provides a method for manufacturing an active switch array substrate, and the active switch array substrate, the method includes: providing a substrate; coating a first metal layer on the substrate; forming a gate electrode by treating the first metal layer; depositing an amorphous silicon layer on the substrate and the gate electrode; coating a second metal layer on the amorphous silicon layer; forming a patterned second metal layer; coating a passivation layer on the patterned second metal layer; forming a through hole in the passivation layer; coating a light permeability conductive layer on the passivation layer; and carrying out a fourth photolithography process to the light permeability conductive layer, the passivation layer, and the patterned second metal layer, to form a channel, a source electrode, and a drain electrode on the light permeability conductive layer, the passivation layer, and the patterned second metal layer.