Disclosed is a semiconductor device comprising a semiconductor substrate, an under-bump pattern on the semiconductor substrate and including a first metal, a bump pattern on the under-bump pattern, and an organic dielectric layer on the semiconductor substrate and in contact with a sidewall of the bump pattern. The bump pattern includes a support pattern in contact with the under-bump pattern and having a first width, and a solder pillar pattern on the support pattern and having a second width. The first width is greater than the second width. The support pattern includes at least one of a solder material and an intermetallic compound (IMC). The intermetallic compound includes the first metal and the solder material.

A semiconductor device includes a semiconductor chip having a passivation film, a stress relieving layer provided on the passivation film, and a groove formed in a periphery of a surface of the semiconductor chip, the groove being provided inside of an edge of the semiconductor chip, wherein the stress relieving layer is partly disposed in the groove.

A display device including a display panel including a base substrate, a plurality of pixels disposed on the base substrate, and a plurality of panel pad rows that are spaced apart from the pixels in a first direction. Each of the panel pad rows includes a plurality of panel pads arranged in a second direction crossing the first direction in a perpendicular manner, a connecting circuit board disposed on the display panel and connected to the panel pads, and a connection member disposed between the display panel and the connecting circuit board to electrically connect the display panel to the connecting circuit board. A minimum-spaced distance between an edge of the base substrate and the panel pads adjacent thereto may be optimized to improve an adhesion property and an electrical connection reliability between the panel pads and the connecting circuit board.

An acoustic wave device includes a piezoelectric layer, an interdigital transducer, and a slow wave propagation overlay over a portion of the interdigital transducer. By providing electrode fingers of the interdigital transducer such that a portion of the width thereof is dependent on an electrode period, a desirable wave mode may be maintained in the acoustic wave device. Further, by varying a width of the slow wave propagation overlay based on the electrode period, the desirable wave mode may be further maintained.

A semiconductor device includes a semiconductor chip having a passivation film, a stress relieving layer provided on the passivation film, and a groove formed in a periphery of a surface of the semiconductor chip, the groove being provided inside of an edge of the semiconductor chip, wherein the stress relieving layer is partly disposed in the groove.

A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.

A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.

A method of manufacturing a semiconductor device includes providing an electrically conductive carrier and placing a semiconductor chip over the carrier. The method includes applying an electrically insulating layer over the carrier and the semiconductor chip. The electrically insulating layer has a first face facing the carrier and a second face opposite to the first face. The method includes selectively removing the electrically insulating layer and applying solder material where the electrically insulating layer is removed and on the second face of the electrically insulating layer.

A display device including a display panel including a base substrate, a plurality of pixels disposed on the base substrate, and a plurality of panel pad rows that are spaced apart from the pixels in a first direction. Each of the panel pad rows includes a plurality of panel pads arranged in a second direction crossing the first direction in a perpendicular manner, a connecting circuit board disposed on the display panel and connected to the panel pads, and a connection member disposed between the display panel and the connecting circuit board to electrically connect the display panel to the connecting circuit board. A minimum-spaced distance between an edge of the base substrate and the panel pads adjacent thereto may be optimized to improve an adhesion property and an electrical connection reliability between the panel pads and the connecting circuit board.

A semiconductor device includes an integrated circuit that is disposed at a first face side of a semiconductor substrate, the semiconductor substrate having a first face and a second face, the second face opposing the first face, the semiconductor substrate having a through hole from the first face to the second face; an external connection terminal that is disposed at the first face side; a conductive portion that is disposed in the through hole, the conductive portion being electrically connected to the external connection terminal; and an electronic element that is disposed at a second face side.