An electronic package is provided and includes at least one protective structure positioned between a first electronic element and a second electronic element on a carrier for reducing stresses generated inside the first electronic element and the second electronic element when a filling material is formed on the carrier, encapsulates the protective structure and comes into contact with the first electronic element and the second electronic element, thereby preventing cracking of the first electronic element and the second electronic element and improving the reliability of the electronic package.

A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

In one example, a semiconductor die comprises: a semiconductor substrate having a circuit formed therein; one or more metal layers on the semiconductor substrate, the one or more metal layers coupled to the circuit; a metal interface structure on the one or more metal layers, in which the metal interface structure has opposite first and second surfaces, and the first surface faces the one or more metal layers; and a dissolvable metal layer on the second surface.

Provided is an electronic substrate that achieves a reduction in the size of a substrate and enables a void risk in an underfill to be reduced, and an electronic apparatus. The electronic substrate includes an electronic chip that is placed above a substrate, an electrode that exists between the substrate and the electronic chip and electrically connects the substrate and the electronic chip, an underfill with which a space between the substrate and the electronic chip is filled so that the electrode is sealed and protected, a protection target to be protected from inflow of the underfill, the protection target being formed on the substrate, and an underfill inflow prevention unit that is formed in the substrate so as to surround an entirety or a portion of the protection target.

An integrated circuit package and a method of forming the same are provided. A method includes stacking a plurality of integrated circuit dies on a wafer to form a die stack. A bonding process is performed on the die stack. The bonding process mechanically and electrically connects adjacent integrated circuit dies of the die stack to each other. A dam structure is formed over the wafer. The dam structure surrounds the die stack. A first encapsulant is formed over the wafer and between the die stack and the dam structure. The first encapsulant fills gaps between the adjacent integrated circuit dies of the die stack. A second encapsulant is formed over the wafer. The second encapsulant surrounds the die stack, the first encapsulant and the dam structure.

A method of forming a semiconductor device includes attaching a first semiconductor device to a first surface of a substrate; forming a sacrificial structure on the first surface of the substrate around the first semiconductor device, the sacrificial structure encircling a first region of the first surface of the substrate; and forming an underfill material in the first region.

Integrated circuit substrates having features for containing liquid adhesive, and methods for fabricating such substrates, are provided. A device can include a first substrate layer and a second substrate layer adhered to the first substrate layer such that a portion of the top surface of the first substrate layer is exposed to define a bottom of a cavity, and an edge of the second substrate layer adjacent to the exposed top surface of the first substrate layer defines an edge of the cavity. The device can include an integrated circuit die adhered to the exposed top surface of first substrate layer with a liquid adhesive. The first substrate layer can define a trench in the bottom of the cavity between a region of the integrated circuit die and the edge of the cavity such that the trench can receive bleed-out of the liquid adhesive from between the integrated circuit die and the top surface of the first substrate layer.

Provided are a wafer level package and a method of manufacturing the same, wherein an underfill sufficiently fills a space between a redistribution substrate and a semiconductor chip, thereby reducing warpage. The wafer level package includes a redistribution substrate including at least one redistribution layer (RDL), a semiconductor chip on the redistribution substrate, and an underfill filling a space between the redistribution substrate and the semiconductor chip. The underfill covers side surfaces of the semiconductor chip. The redistribution substrate includes a trench having a line shape and extending in a first direction along a first side surface of the semiconductor chip.

A chip arranging method for arranging a plurality of chips on a wafer includes a groove forming step of forming a plurality of intersecting grooves that mark off each of chip placement regions on the front surface side of the wafer, a liquid supplying step of supplying a liquid to the chip placement regions, a chip placing step of placing the chips on the liquid to position the chips in the chip placement regions by the surface tension of the liquid after carrying out the liquid supplying step, and a liquid removing step of removing the liquid to arrange the plurality of chips on the wafer after carrying out the chip placing step.

A substrate structure is provided, which includes a substrate having a plurality of conductors and at least a receiving space formed on a surface of the substrate with the receiving space free from penetrating the substrate. During an encapsulating process, an encapsulant can be filled in the receiving space so as to strengthen the bonding between the substrate and the encapsulant, thereby preventing delamination from occurring therebetween.