Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

Various example embodiments concern an integrated circuit (IC) package having a clip with a protruding tough-shaped finger portion. The clip can be used in various IC packages including, for example, soft-soldered compact power packages such as rectifiers with specified surge current capability. Such embodiments can be implemented to allow for a visual inspection capability of the soldering area for connecting a lead frame, via the clip, to a surface of the IC package die, while still providing sufficient thermal mass to limit the temperature increase during forward surge current loads. This results in a simple to manufacture design without compromising too much on performance.

A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.

A device comprising a connecting plate and a circuit element is disclosed. The circuit element is electrically coupled to the connecting plate through a solder connection including a plurality of solder balls disposed between the circuit element and the connecting plate. An underfill layer is formed between the circuit element and the connecting plate and configured to provide bonding between the circuit element and the connecting plate. The solder connection includes a first solder area with a first solder ball density and a second solder area with a second solder ball density. The first solder ball density is less than the second solder ball density. The underfill layer includes a bonding material continuously disposed in the second solder area of the solder connection.

A device comprising a connecting plate and a circuit element is disclosed. The circuit element is electrically coupled to the connecting plate through a solder connection including a plurality of solder balls disposed between the circuit element and the connecting plate. An underfill layer is formed between the circuit element and the connecting plate and configured to provide bonding between the circuit element and the connecting plate. The solder connection includes a first solder area with a first solder ball density and a second solder area with a second solder ball density. The first solder ball density is less than the second solder ball density. The underfill layer includes a bonding material continuously disposed in the second solder area of the solder connection.

An electronic device includes: a support member that has a metallic placement surface joined to the conductive bonding layer, and a metallic sealing surface provided on an outer side of the placement surface in an in-plane direction of the placement surface to adjoin the placement surface and to surround the placement surface; and a resin member, which is a synthetic resin molded article, joined to the sealing surface and covering the electronic component. The sealing surface includes a rough surface having a plurality of laser irradiation marks having a substantially circular shape. The rough surface includes a first region and a second region. The second region has a higher density of the laser irradiation marks in the in-plane direction than the first region.

A semiconductor device according to the present invention incudes a semiconductor chip, a conductive member for supporting the semiconductor chip, a joint material provided between the conductive member and the semiconductor chip, and a release groove formed on the surface of the conductive member and arranged away from the semiconductor chip with the one end and the other end of the release groove connected to the peripheral edges of the conductive member, respectively.

The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.

There is provided a circuit module where a sufficient amount of underfill resin may be supplied to corner portions of a semiconductor chip. A circuit module includes a circuit board provided with a plurality of electrode pads on a surface of the board, a semiconductor chip arranged on the board, the chip including a surface and a back surface, where each of a plurality of solder bumps and provided on the back surface is solder joined to a corresponding one of the plurality of electrode pads, and an underfill provided between the surface of the board and the back surface of the chip. Furthermore, the chip includes an eaves portion of a predetermined thickness at an outer periphery of the surface, and the underfill forms a fillet extending from a bottom surface of the eaves portion to the surface of the board along a side wall of the chip.

Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate having a recess, an electronic component disposed in the recess and electrically coupled to the substrate, and an underfill material disposed in the recess between the electronic component and the substrate. Associated systems and methods are also disclosed.