The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the to package structure; and a cavity enclosed by the bottom exterior layer.

The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the package structure; and a cavity enclosed by the bottom exterior layer.

An electromagnetic interference shielding structure includes a base layer and an electromagnetic interference shielding layer disposed on the base layer. The electromagnetic shielding layer includes a plurality of porous conductor layers, each of the porous conductor layers has a plurality of openings, and the porous conductor layers are stacked on each other in a stacking direction. A semiconductor package includes the electromagnetic interference shielding structure.

The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the package structure; and a cavity enclosed by the bottom exterior layer.

Some implementations of the disclosure are directed to a method including: placing a first solder preform and a first tacky material between a first device and a second device to form a semiconductor assembly, the first tacky material configured to cause a surface of the first device to adhere to a first surface of the first solder preform, and a first surface of the second device to adhere to a second surface of the first solder preform opposite the first surface; and reflowing the semiconductor assembly at a temperature above a solidus temperature of the first solder preform to bond, via at least the first solder preform, the first device to the second device. The first tacky material has a reflow residual weight of less than 1% of the weight of the first tacky material before reflowing the semiconductor assembly.