Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first and second semiconductor structures. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact. The second semiconductor structure includes a second device layer, and a second bonding layer disposed below the second device layer and including a second bonding contact. The first bonding contact is in contact with the second bonding contact at the bonding interface. At least one of the first bonding contact and the second bonding contact includes a capping layer at the bonding interface and having a conductive material different from a remainder of the respective first or second bonding contact.

In an example, a semiconductor device includes a first semiconductor structure including a memory array device, a second semiconductor structure including a peripheral device, and a bonding structure comprising a first bonding pad, a second bonding pad, and a remainder layer located between and in contact with the first and second bonding pad in a vertical direction. The first bonding pad is located between the remainder layer and the first semiconductor structure in the vertical direction. The second bonding pad is located between the remainder layer and the second semiconductor structure in the vertical direction. A conductive material of the remainder layer is cobalt metal different from the first and second bonding pads.

Implanting ions to form a cleave layer in a semiconductor device causes damage to sensitive materials such as high-K dielectrics. In a process for forming a cleave layer and repairing damage caused by ion implantation, ions are implanted through a circuit layer of a substrate to form a cleave plane. The substrate is exposed to a hydrogen gas mixture for a first time at a first temperature to repair damage caused by the implanted ions. A cleaving process may then be performed, and the cleaved substrate may be stacked in a 3DIC structure.

Representative implementations of techniques and methods include processing singulated dies in preparation for bonding. A plurality of semiconductor die components may be singulated from a wafer component, the semiconductor die components each having a substantially planar surface. Particles and shards of material may be removed from edges of the plurality of semiconductor die component. Additionally, one or more of the plurality of semiconductor die components may be bonded to a prepared bonding surface, via the substantially planar surface.

The present disclosure describes a semiconductor structure having bonded wafers with storage layers and a method to bond wafers with storage layers. The semiconductor structure includes a first wafer including a first storage layer with carbon, a second wafer including a second storage layer with carbon, and a bonding layer interposed between the first and second wafers and in contact with the first and second storage layers.

A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.

A method includes picking up a first package component, removing an oxide layer on an electrical connector of the first package component, placing the first package component on a second package component after the oxide layer is removed, and bonding the first package component to the second package component.

A bonding apparatus includes a first holder configured to hold a first substrate divided into multiple chips with a tape and a ring frame therebetween, the first substrate being attached to the tape, and an edge of the tape being attached to the ring frame; a second holder configured to hold a second substrate, which is disposed on an opposite side to the tape with respect to the first substrate therebetween, while maintaining a distance from the first substrate; and a pressing device configured to press the multiple chips one by one with the tape therebetween to press and bond the corresponding chip to the second substrate.

Provided is a semiconductor device capable of accurately positioning a semiconductor element with respect to a metal circuit pattern or positioning an insulating substrate with respect to a base plate without using a dedicated positioning jig, thereby being able to be manufactured inexpensively and a method of manufacturing the semiconductor device. The semiconductor device includes: an insulating substrate; and a semiconductor element, wherein the insulating substrate includes an insulating layer and a metal circuit pattern provided on an upper surface of the insulating layer, the semiconductor element is solder joined to an upper surface of the metal circuit pattern, and an oxide film or a nitride film is provided in a region where the semiconductor element is not solder joined in the upper surface of the metal circuit pattern.

A method of forming a semiconductor device includes providing a semiconductor substrate with a circuit layer, forming a range compensating layer over the semiconductor substrate, the range compensating layer having a plurality of different thicknesses, each of the plurality of different thicknesses being inversely proportional to a stopping power of structures disposed under the respective thickness of the range compensating layer, implanting ions into the semiconductor substrate, the ions traveling through the range compensating layer and the circuit layer to define a cleave plane in the semiconductor substrate, removing the range compensating layer, and cleaving the semiconductor substrate at the cleave plane. The range compensating layer can be used to compensate for variations in ion penetration depth.