An anisotropic conductive film includes a conductive layer; a first resin insulating layer over a first surface of the conductive layer; and a second resin insulating layer over a second surface of the conductive layer, wherein the conductive layer comprises a plurality of conductive particles and a nano fiber connecting the plurality of conductive particles to each other, each of the plurality of conductive particles comprising a plurality of needle-shaped protrusions having a conical shape, and wherein the first resin insulating layer and the second resin insulating layer comprise a same material and have different thicknesses.

A bonding structure and a method for bonding components, wherein the bonding structure includes a nanoparticle preform. In accordance with embodiments, the nanoparticle preform is placed on a substrate and a workpiece is placed on the nanoparticle preform.

A method of manufacturing a mounting substrate includes a provisional pressing process, a driver pressing process, and a flexible printed circuit board pressing process. In the provisional pressing process, a driver 40 and a flexible printed circuit board are provisionally pressed. In the driver pressing process, the driver 40 is thermally pressed with using a pressing head 52 having a driver pressing surface 53 and a flexible printed circuit board pressing surface 54, and pressure force is applied to the driver 40 with elastically deforming a buffer 57. In the flexible printed circuit board pressing process, the pressing head 52 is moved closer to the glass substrate GS such that a height level of the flexible printed circuit board pressing surface 54 with respect to a mounting surface 21 and a height level of the driver pressing surface 53 with respect to the mounting surface 21 are same and pressure force is applied to the flexible printed circuit board 30 with elastically deforming the buffer 57.

An anisotropic conductive film includes a conductive layer; a first resin insulating layer over a first surface of the conductive layer; and a second resin insulating layer over a second surface of the conductive layer, wherein the conductive layer comprises a plurality of conductive particles and a nano fiber connecting the plurality of conductive particles to each other, each of the plurality of conductive particles comprising a plurality of needle-shaped protrusions having a conical shape, and wherein the first resin insulating layer and the second resin insulating layer comprise a same material and have different thicknesses.

A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

A semiconductor package includes: a first semiconductor chip including a first surface and a second surface opposite to each other and including first through electrodes; at least a second semiconductor chip stacked on the first surface of the first semiconductor chip and comprising second through electrodes electrically connected to the first through electrodes; and a molding layer contacting the first surface of the first semiconductor chip and a side wall of the at least one second semiconductor chip and including a first external side wall connected to and on the same plane as a side wall of the first semiconductor chip, wherein the first external side wall of the molding layer extends to be inclined with respect to a first direction orthogonal to the first surface of the first semiconductor chip, and both the external first side wall of the molding layer and the side wall of the first semiconductor chip have a first slope that is the same for both the first external side wall of the molding layer and the side wall of the first semiconductor chip.

An arrangement for joining two joining members includes a first part having a support surface, a first carrier element configured to carry at least one foil, a transportation unit configured to arrange the first carrier element such that the foil is arranged above the support surface in a vertical direction, and a second part configured to exert pressure to a joining stack, when the joining stack is arranged on the support surface. The joining stack includes a first joining member arranged on the support surface, a second joining member, and an electrically conductive connection layer arranged between the joining members. When pressure is exerted on the joining stack, the foil is arranged between the second part and the joining stack and is pressed onto the joining stack and the joining stack is pressed onto the first part, compressing the connection layer and forming a bond between the joining members.

An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160° C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40° C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50° C. than the reaction start temperature.

An encapsulation resin composition is used to hermetically seal a gap between a base member and a semiconductor chip bonded onto the base member. The encapsulation resin composition has a reaction start temperature of 160° C. or less. A melt viscosity of the encapsulation resin composition is 200 Pa.Math.s or less at the reaction start temperature, 400 Pa.Math.s or less at any temperature which is equal to or higher than a temperature lower by 40° C. than the reaction start temperature and which is equal to or lower than the reaction start temperature, and 1,000 Pa.Math.s or less at a temperature lower by 50° C. than the reaction start temperature.