Patent classifications
H01L2224/83203
Semiconductor package including non-conductive film between package substrate and semiconductor chip thereon
A semiconductor package including a package substrate, a semiconductor chip on a top surface of the package substrate, a connection terminal between the package substrate and the semiconductor chip, the connection terminal connecting the package substrate to the semiconductor chip, a non-conductive film (NCF) between the package substrate and semiconductor chip, the NCF surrounding the connection terminal and bonding the semiconductor chip to the package substrate, and a side encapsulation material covering a side surface of the semiconductor chip, contacting the package substrate, and including a first portion between a bottom surface of the semiconductor chip and the top surface of the package substrate may be provided. At least a portion of the NCF includes a second portion that horizontally protrudes from the semiconductor chip when viewed, and a portion of the side encapsulation material is in contact with the bottom surface of the semiconductor chip.
Semiconductor packages
Semiconductor packages may include a first semiconductor chip including a first through-electrode and a first upper connection pad and on an upper surface of the first semiconductor chip, a second semiconductor chip on the first semiconductor chip and including a second lower connection pad on a lower surface of the second semiconductor chip, a connection bump between the first and second semiconductor chips and connected to the first upper connection pad and the second lower connection pad, a first insulating layer between the first and second semiconductor chips and surrounding the first upper connection pad, the connection bump, and the second lower connection pad, and a second insulating layer between the first semiconductor chip and the first insulating layer and extending on the upper surface of the first semiconductor chip, a side surface of the first upper connection pad, and a portion of a side surface of the connection bump.
Semiconductor packages
Semiconductor packages may include a first semiconductor chip including a first through-electrode and a first upper connection pad and on an upper surface of the first semiconductor chip, a second semiconductor chip on the first semiconductor chip and including a second lower connection pad on a lower surface of the second semiconductor chip, a connection bump between the first and second semiconductor chips and connected to the first upper connection pad and the second lower connection pad, a first insulating layer between the first and second semiconductor chips and surrounding the first upper connection pad, the connection bump, and the second lower connection pad, and a second insulating layer between the first semiconductor chip and the first insulating layer and extending on the upper surface of the first semiconductor chip, a side surface of the first upper connection pad, and a portion of a side surface of the connection bump.
CONDUCTIVE PARTICLE, AND CONNECTION MATERIAL, CONNECTION STRUCTURE, AND CONNECTING METHOD OF CIRCUIT MEMBER
There is provided a conductive particle including a core particle containing a resin material, and a surface layer that covers a surface of the core particle and contains a solder material, in which a melting point of the solder material is equal to or lower than a softening point of the resin material.
Method of attaching an electronic part to a copper plate having a surface roughness
In a method for producing an electronic part mounting substrate wherein an electronic part 14 is mounted on one major surface (a surface to which the electronic part 14 is to be bonded) of the metal plate 10 of copper, or aluminum or the aluminum alloy (when a plating film 20 of copper is formed on the surface), the one major surface of the metal plate 10 (or the surface of the plating film 20 of copper) is surface-machined to be coarsened so as to have a surface roughness of not less than 0.4 μm, and then, a silver paste is applied on the surface-machined major surface (or the surface-machined surface of the plating film 20 of copper) to arrange the electronic part 14 thereon to sinter silver in the silver paste to form a silver bonding layer 12 to bond the electronic part 14 to the one major surface of the metal plate 10 (or the surface of the plating film 20 of copper) with the silver bonding layer 12.
ADHESIVE TRANSFER FILM AND METHOD FOR MANUFACTURING POWER MODULE SUBSTRATE BY USING SAME
The present disclosure relates to an adhesive transfer film for bonding a semiconductor chip and a spacer to a substrate and a method for manufacturing a power module substrate by using same, the adhesive transfer film being obtained by manufacturing an Ag sintering paste in the form of a film. The present disclosure can reduce the process time by minimizing a sintering process, and can reduce equipment investment cost.
ADHESIVE TRANSFER FILM AND METHOD FOR MANUFACTURING POWER MODULE SUBSTRATE BY USING SAME
The present disclosure relates to an adhesive transfer film for bonding a semiconductor chip and a spacer to a substrate and a method for manufacturing a power module substrate by using same, the adhesive transfer film being obtained by manufacturing an Ag sintering paste in the form of a film. The present disclosure can reduce the process time by minimizing a sintering process, and can reduce equipment investment cost.
Transferring Method, Manufacturing Method, Device and Electronic Apparatus of Micro-LED
A transferring method, a manufacturing method, a device and an electronic apparatus of micro-LED. The method for transferring micro-LED, comprises: forming micro-LEDs (202) on a laser-transparent original substrate (201), providing an anisotropic conductive layer (203) on a receiving substrate (204), bringing the micro-LEDs (202) into contact with the anisotropic conductive layer (203) on the receiving substrate (204), irradiating the original substrate (201) with laser from the original substrate side to lift-off the micro-LEDs (202) from the original substrate (201), and processing the anisotropic conductive layer (203), to electrically connect the micro-LEDs (202) with the pads (205′) on the receiving substrate (204).
FLEXIBLE HYBRID ELECTRONIC SYSTEM PROCESSING METHOD AND FLEXIBLE HYBRID ELECTRONIC SYSTEM
A processing method of a flexible hybrid electronic system is provided and includes the following steps: etching out embedded grooves on a front surface of a silicon-based substrate embedding a plurality of heterogeneous chips into corresponding embedded grooves, wherein front surfaces of the embedded chips are flush with the front surface of the silicon-based substrate; then gradually realize the polymer flexible connection, electrical interconnection, insulation protection, and polymer flexible coverage between chips. The processing method processes the flexible hybrid electronic system based on the method of embedding chips, which can reduce material loss and processing steps, and is beneficial to realizing large-scale manufacturing.
System and Method for Immersion Bonding
A representative system and method for manufacturing stacked semiconductor devices includes disposing an aqueous alkaline solution between a first semiconductor device and a second semiconductor device prior to bonding. In a representative implementation, first and second semiconductor devices may be hybrid bonded to one another, where dielectric features of the first semiconductor device are bonded to dielectric features of the second semiconductor device, and metal features of the first semiconductor device are bonded to metal features of the second semiconductor device. Immersion bonds so formed demonstrate a substantially lower incidence of delamination associated with bond defects.