A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

Encapsulated stress mitigation layers and assemblies having the same are disclosed. An assembly that includes a first substrate, a second substrate, an encapsulating layer disposed between the first and second substrates, and a stress mitigation layer disposed in the encapsulating layer such that the stress mitigation layer is encapsulated within the encapsulating layer. The stress mitigation layer has a lower melting temperature relative to a higher melting temperature of the encapsulating layer. The assembly includes an intermetallic compound layer disposed between the first substrate and the encapsulating layer such that the encapsulating layer is separated from the first substrate by the intermetallic compound layer. The stress mitigation layer melts into a liquid when the assembly operates at a temperature above the low melting temperature of the stress mitigation layer and the encapsulating layer maintains the liquid of the stress mitigation layer within the assembly.

Embodiments of the present disclosure include a method of forming an electronic assembly with a mesh bond layer. The method may include forming a mesh bond material comprising a first surface spaced apart from a second surface by a thickness of the mesh bond material and one or more openings extending from the first surface through the thickness of the mesh bond material to the second surface. The method may further include adjusting at least one of: the thickness of the mesh bond material, a geometry of the one or more openings, or a size of the one or more openings of the mesh bond material, where the adjusting modifies a Young's modulus of the mesh bond material, and bonding the first surface of the mesh bond material to a surface of a semiconductor device.

The semiconductor device includes a metal plate, a semiconductor element held on the metal plate, a wiring board connected to a surface electrode of the semiconductor element in a facing manner and a conductor fixed to the wiring board wired to the semiconductor element. The conductor has a plate-like shape. One end of the conductor is arranged to be connectable to an outside. One surface side of another end of the conductor is fixed to a surface of the wiring hoard. The conductor includes at least one protruding step on the one surface of the other end. A top portion of the protruding step includes a contact surface parallel to the surface of the wiring board. The other end of the conductor is fixed to the wiring board by the contact surface and the surface of the wiring board coming into close contact with each other.

A semiconductor device and method is disclosed. In one embodiment, the semiconductor device comprises a semiconductor die comprising a first surface and a second surface opposite to the first surface, a first metallization layer disposed on the first surface of the semiconductor die, a first solder layer disposed on the first metallization layer, wherein the first solder layer contains the compound Sn/Sb, and a first contact member comprising a Cu-based base body and a Ni-based layer disposed on a main surface of the Cu-based base body, wherein the first contact member is connected with the Ni-based layer to the first solder layer.

Provides is a laser bonding method. The method includes forming a bonding part on a substrate; aligning a bonding target on the bonding part and bonding the bonding part and the bonding target. The bonding includes heating the bonding part using a laser. The bonding part formed on the substrate includes an adhesive layer and a conductive particle located in the adhesive layer.

A bonding material that contains first particles containing a first metal, second particles containing a second metal having a melting point lower than that of the first metal, and filling resin is supplied on one of a semiconductor element or a conductor member, and a gap is formed in a surface of the supplied bonding material. The other of the conductor member or the semiconductor element is mounted on and pressed against the bonding material in which the gap is formed, and the filling resin unevenly distributed on the surface of the bonding material is moved to the gap.

A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.

A method for fabricating a semiconductor device includes providing a die with a metallization layer including a first metal with a high melting point; providing a die carrier including a second metal with a high melting point; providing a solder material including a third metal with a low melting point; providing a layer of a fourth metal with a high melting point on the semiconductor die or the die carrier; and soldering the semiconductor die to the die carrier and creating: a first intermetallic compound between the semiconductor die and the die carrier and including the first metal and the third metal; a second intermetallic compound between the first intermetallic compound and the die carrier and including the second metal and the third metal; and precipitates of a third intermetallic compound between the first intermetallic compound and the second intermetallic compound and including the third metal and the fourth metal.