A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad, and a second bonding pad on a top surface of the stacking structure, wherein a shortest distance between the first bonding pad and the second bonding pad is less than 150 μm; a carrier comprising a connecting surface; a third bonding pad and a fourth bonding pad on the connecting surface of the carrier; and a conductive connecting layer comprising a current conductive area between the first bonding pad and the third bonding pad and between the second bonding pad and the fourth bonding pad.

The present invention relates to a semiconductor device, including: a substrate; a plurality of first semiconductor elements and a second semiconductor element arranged on a mount area of the substrate; an external electrode to supply electricity to the first and second semiconductor elements; and a frame of reflective material formed at a periphery of the mount area. Extensions of the first external electrodes are formed at the inner side of the plurality of wirings, and the first external electrodes are formed along the periphery of the mount area at the outer side of at least one of the second external electrodes or the wiring connected to the second external electrodes, and electrodes of the plurality of first semiconductor elements are electrically connected to the pair of first external electrodes by a bonding wire that bridges across at least one of the pair of the second external electrodes or the wiring electrically connected to the pair of second external electrodes with intervening a part of the frame therebetween.

The present invention relates to a semiconductor device, including: a substrate; a plurality of first semiconductor elements and a second semiconductor element arranged on a mount area of the substrate; an external electrode to supply electricity to the first and second semiconductor elements; and a frame of reflective material formed at a periphery of the mount area. Extensions of the first external electrodes are formed at the inner side of the plurality of wirings, and the first external electrodes are formed along the periphery of the mount area at the outer side of at least one of the second external electrodes or the wiring connected to the second external electrodes, and electrodes of the plurality of first semiconductor elements are electrically connected to the pair of first external electrodes by a bonding wire that bridges across at least one of the pair of the second external electrodes or the wiring electrically connected to the pair of second external electrodes with intervening a part of the frame therebetween.

In one implementation, a semiconductor package includes an integrated circuit (IC) attached to a die paddle segment of a first patterned conduct carrier and coupled to a switch node segment of the first patterned conductive carrier by an electrical connector. In addition, the semiconductor package includes a second patterned conductive carrier situated over the IC, a magnetic material situated over the second patterned conductive carrier, and a third patterned conductive carrier situated over the magnetic material. The second patterned conductive carrier and the third patterned conductive carrier are electrically coupled so as to form windings of an integrated inductor in the semiconductor package.

The present invention relates to a gas sensor package including an insulating substrate, a metal layer on one surface of the insulating substrate, a stepped portion disposed on the metal layer and configured to divide the metal layer into a plurality of portions, and a gas sensor chip mounted on the metal layer located on the stepped portion and including a sensing part, wherein a width of the stepped portion is provided to be equal to or less than an interval between two adjacent electrode terminals of a plurality of electrode terminals of the gas sensor chip.

A repairing method, manufacturing method, device and electronic apparatus of micro-LED are disclosed. The method for repairing micro-LED defects comprises: obtaining a micro-LED defect pattern on a receiving substrate; forming micro-LEDs (703b) corresponding to the defect pattern on a laser-transparent repair carrier substrate (707); aligning the micro-LEDs (703b) on the repair carrier substrate (707) with defect positions on the receiving substrate, and bringing the micro-LEDs (703b) into contact with pads at the defect positions; and irradiating the repair carrier substrate with a laser from the repair carrier substrate side, to lift-off the micro-LEDs from the repair carrier substrate (707).

A chip package includes at least one integrated circuit die. The integrated circuit die includes a substrate portion having an internal plane between a front side and a back side, an electrical interconnect portion on the front side, a plurality of first connection terminals on an upper surface of the electrical interconnect portion, a plurality of second connection terminals on the back side of the substrate portion, a plurality of connection wirings electrically connecting the first connection terminals and the second connection terminals, a chip selection terminal between the internal plane of the substrate portion and the upper surface of the electrical interconnect portion, and a chip selection wiring connected to the chip selection terminal and one of the second connection terminals and the first connection terminals. At least one of the chip selection wiring and the plurality of connection wirings includes a tilted portion with respect to the back side of the substrate portion.

A light emitting device for a display including a first LED sub-unit, a second LED sub-unit disposed on the first LED sub-unit, and a third LED sub-unit disposed on the second LED sub-unit, in which the third LED sub-unit is configured to emit light having a shorter wavelength than that of light emitted from the first LED sub-unit, and to emit light having a longer wavelength than that of light emitted from the second LED sub-unit.

The present invention discloses a flexible integrated display panel module and manufacturing method thereof, the flexible integrated display panel module includes a flexible integrated display substrate, which including an integrated area, an active area and a non-display disposed at one side of the integrated area, the integrated area divided into a plurality of areas, used to defined as a corresponding functional area. The functional area includes: a display wiring functional area and a plurality of direct on-cell touch control wiring functional areas disposed on both sides of the display functional area.

A method for fabricating a thin-film integrated circuit, IC, including a plurality of electronic components, the method comprising: forming, using a first fabrication technique, the plurality of electronic components, and forming, using a second fabrication technique, a conductive layer on the plurality of electronic components to form a redistribution layer, RDL, wherein the first fabrication technique includes photolithographic patterning, and the first fabrication technique is different to the second fabrication technique.