A hybrid bonding layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity, and a ball grid array (BGA) disposed within the MIO layer. The MIO layer and the BGA may be disposed between a pair of bonding layers. The MIO layer and the BGA each have a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the hybrid bonding layer can be transient liquid phase bonded between a substrate and a semiconductor device. The pair of bonding layers may include a first pair of bonding layers with a melting point above the TLP sintering temperature and a second pair of bonding layers with a melting point below the TLP sintering temperature.

A hybrid bonding layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity, and a ball grid array (BGA) disposed within the MIO layer. The MIO layer and the BGA may be disposed between a pair of bonding layers. The MIO layer and the BGA each have a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the hybrid bonding layer can be transient liquid phase bonded between a substrate and a semiconductor device. The pair of bonding layers may include a first pair of bonding layers with a melting point above the TLP sintering temperature and a second pair of bonding layers with a melting point below the TLP sintering temperature.

In some embodiments, the present disclosure relates to an integrated chip including a substrate and a first die disposed over the substrate. A first plurality of die stopper bumps are disposed along a backside of the first die. The first plurality of die stopper bumps directly contact the backside of the first die, and the first plurality of die stopper bumps are arranged as a plurality of groups of die stopper bumps. A plurality of adhesive structures are also present. Each of the plurality of adhesive structures surrounds a corresponding group of the plurality of groups of die stopper bumps.

In some embodiments, the present disclosure relates to an integrated chip including a substrate and a first die disposed over the substrate. A first plurality of die stopper bumps are disposed along a backside of the first die. The first plurality of die stopper bumps directly contact the backside of the first die, and the first plurality of die stopper bumps are arranged as a plurality of groups of die stopper bumps. A plurality of adhesive structures are also present. Each of the plurality of adhesive structures surrounds a corresponding group of the plurality of groups of die stopper bumps.

A multilayer composite bonding material with a plurality of thermal stress compensation layers is provided. The plurality of thermal stress compensation layers include a metal core layer, a pair of particle layers extending across the metal core layer such that the metal core layer is sandwiched between the pair of particle layers, and a pair of metal outer layers extending across the pair of particle layers such that the pair of particle layers are sandwiched between the pair of metal outer layers. A pair of low melting point (LMP) bonding layers extend across the pair of metal outer layers. The metal core layer, the pair of particle layers, and the pair of metal outer layers each have a melting point above a transient liquid phase (TLP) sintering temperature, and the pair of LMP bonding layers each have a melting point below the TLP sintering temperature.

A multilayer composite bonding material with a plurality of thermal stress compensation layers is provided. The plurality of thermal stress compensation layers include a metal core layer, a pair of particle layers extending across the metal core layer such that the metal core layer is sandwiched between the pair of particle layers, and a pair of metal outer layers extending across the pair of particle layers such that the pair of particle layers are sandwiched between the pair of metal outer layers. A pair of low melting point (LMP) bonding layers extend across the pair of metal outer layers. The metal core layer, the pair of particle layers, and the pair of metal outer layers each have a melting point above a transient liquid phase (TLP) sintering temperature, and the pair of LMP bonding layers each have a melting point below the TLP sintering temperature.

A hybrid bonding layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity, and a ball grid array (BGA) disposed within the MIO layer. The MIO layer and the BGA may be disposed between a pair of bonding layers. The MIO layer and the BGA each have a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the hybrid bonding layer can be transient liquid phase bonded between a substrate and a semiconductor device. The pair of bonding layers may include a first pair of bonding layers with a melting point above the TLP sintering temperature and a second pair of bonding layers with a melting point below the TLP sintering temperature.

A hybrid bonding layer includes a metal inverse opal (MIO) layer with a plurality of hollow spheres and a predefined porosity, and a ball grid array (BGA) disposed within the MIO layer. The MIO layer and the BGA may be disposed between a pair of bonding layers. The MIO layer and the BGA each have a melting point above a TLP sintering temperature and the pair of bonding layers each have a melting point below the TLP sintering temperature such that the hybrid bonding layer can be transient liquid phase bonded between a substrate and a semiconductor device. The pair of bonding layers may include a first pair of bonding layers with a melting point above the TLP sintering temperature and a second pair of bonding layers with a melting point below the TLP sintering temperature.

The present invention relates to a camera module in which a thin camera module can be realized at a low cost and an electronic device. The camera module includes a lens unit that stores a lens that condenses light on a light receiving surface of an image sensor; a rigid substrate on which the image sensor is disposed; and a flexible substrate electrically connected with the rigid substrate, wherein in the case where the light receiving surface of the image sensor locates at the top, the lens unit, the flexible substrate, and the rigid substrate are disposed in this order from the top.

The present invention relates to a camera module in which a thin camera module can be realized at a low cost and an electronic device. The camera module includes a lens unit that stores a lens that condenses light on a light receiving surface of an image sensor; a rigid substrate on which the image sensor is disposed; and a flexible substrate electrically connected with the rigid substrate, wherein in the case where the light receiving surface of the image sensor locates at the top, the lens unit, the flexible substrate, and the rigid substrate are disposed in this order from the top.