A clocked comparator includes a first clocked transconductance amplifier configured to receive a first voltage signal and output a first current signal to an internal node in accordance with a clock; a clocked regenerative load configured to enable a second voltage signal at the internal node to self-regenerate in accordance with the clock; a SR (set-reset) latch configured to receive the second voltage signal at the internal node and output a third voltage signal; and a second clocked transconductance amplifier configured to receive the third voltage signal and output a second current signal to the internal node.

In a particular implementation, an apparatus including first and second bias circuits and an inner amplifier provides sense amplifier offset cancellation. The inner amplifier includes: first and second current generators configured to replicate respective first and second currents from the first and second bias circuits, first and second transistors configured to transform the first and second currents into voltage samples, and first and second capacitors configured to store the voltage samples. In a sampling phase, a sampling of the first and second currents may be performed in the inner amplifier, and further, in an amplification phase, an amplification of the stored voltage samples may also be performed in the inner amplifier.

A circuit for implementing an operational transconductance amplifier (OTA) based on telescopic topology, wherein cascode transistors of the operational transconductance amplifier (OTA) are self-biased without using additional biasing circuitry, which not only reduces power consumption but also achieves high gain without extra current, and each cascode stage of the OTA has a pair of transistors so that the swing of the output differential signals of the OTA can be completely symmetrical so as to benefit second-order harmonic rejection, CMRR and PSRR.

A voltage regulator includes a first switch connected between a first input terminal of an error amplifier circuit and an input terminal of the voltage regulator, a second switch connected between a second input terminal of the error amplifier circuit and an output terminal of the voltage regulator, a third switch connected between the first input terminal and the second input terminal, and a short fault detection circuit which detects a short fault of the output terminal, based on an output voltage of the voltage regulator.

In one example an amplifier includes a bias circuit, an open-loop gain stage including a first PMOS having a gate coupled to a first node, a source coupled to a second node, a drain coupled to a third node, and a bulk coupled to the bias circuit, a second PMOS having a gate coupled to a ground node, a source coupled to the second node, a drain coupled to a fourth node, and a bulk coupled to the bias circuit, a first NMOS having a drain and a gate coupled to the third node and a source coupled to a fifth node, a second NMOS having a drain coupled to the fourth node, a gate coupled to the third node, and a source coupled to the fifth node, an adjustable resistor coupleable between the third and fourth nodes, and a buffer stage coupled to the open-loop gain stage.

A common mode feedback (CMFB) loop for a differential amplifier sense an output common mode of a differential circuit and provides feedback to the gates of tail current transistors. Many CMFB loops cannot easily adjust the output common mode voltage and the output common mode may vary over process, voltage, and temperature. An improved CMFB circuit adds a control circuit to control backgates of tail current transistor device(s) of the differential circuit such that the output common mode voltage can be made adjustable.

a logic operation circuit, includes at least one differential logic operation circuit, the differential logic operation circuit includes a logic network module, a differential amplifier module, and a differential amplifier module. The logic network module includes a first logic network unit and a second logic network unit with functions complementarity to each other. A differential signal is generated based on input signals of the first logic network unit and the second logic network unit, the first logic network and the second logic network performs a predetermined logic function to output an operation result based on the input signals. The differential amplifier module, includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, the first input terminal and the second input terminal are connected to an output of the first logic network and the second logic network respectively.

An operational amplifier-based hysteresis comparator and a chip are provided. The hysteresis comparator includes: an input stage and an amplification stage. The input stage includes: a first input branch and a second input branch, where the first input branch generates a first current based on the first voltage, and the second input branch generates a second current based on the second voltage. The first current is connected with a first input terminal of the amplification stage, and the second current is connected with a second input terminal of the amplification stage. An output terminal of the amplification stage outputs a first level when the first current is greater than the second current, and outputs a second level when the first current is less than the second current. The present disclosure changes the hysteresis voltage generation mode, thereby reducing the instability caused by positive feedback.

A power supply circuit and a memory are provided. The power supply circuit includes: a voltage generation module, configured to provide an initial voltage signal; a first power supply module, configured to provide a power reference voltage based on the initial voltage signal; an amplification module, configured to generate and output a first power voltage based on the power reference voltage; a first power network, configured to supply power to at least one function module connected to the first power network; a second power supply module, a second power network and a voltage control module. The second power supply module is configured to provide a second power voltage for the second power network based on the initial voltage signal.

An operational amplifier integrated circuit includes a differential pair of transistors having a first input, a second input. A bias current generator applies a bias current to an output of the differential pair of transistors. A control loop generates a control voltage arising from a difference in potentials between the first input and the second input. An additional current that is added to the bias current is generated in response to the control voltage.