Various aspects of an injection-locked oscillator and method for controlling jitter and/or phase noise are disclosed herein. In accordance with an embodiment, an injection-locked oscillator includes one or more circuits that are configured to receive a pair of complementary phase output signals from one or more gain stages of the injection-locked oscillator. The one or more circuits may be configured to receive one or more switching signals. The received pair of complementary phase output signals are shorted by use of the one or more received switching signals. The shorting reduces the phase difference between an input signal and an output signal of the injection-locked oscillator.

An area efficient amplifier that amplifies a continuous-time continuous-amplitude signal and converts it to a discrete-time discrete-amplitude signal. The amplifier includes a first oscillator having an input and a plurality of N outputs and a second oscillator having an input and N outputs. The amplifier includes N phase detectors, each phase detector has a first input, a second input, a first output, and a second output, where each first input of each phase detector is coupled to respective one of the N outputs of the first oscillator, where each second input of each phase detector is coupled to respective one of the N outputs of the second oscillator. The amplifier includes N quantizers, each quantizer has a data input, a clock input, and an output, where each data input of each quantizer is coupled to respective one first output or one second output of the N phase detectors.

A clock generator comprises a first capacitor, a current source, and a voltage node. A first switch is coupled between the first capacitor and the current source. A second switch is coupled between the first capacitor and voltage node.

Methods and apparatuses featuring a multiplying injection-locked oscillator are described. Some embodiments include a pulse-generator-and-injector and one or more injection-locked oscillators. The outputs of the pulse-generator-and-injector can be injected into corresponding injection points of an injection-locked oscillator. In embodiments that include multiple injection-locked oscillators, the outputs of each injection-locked oscillator can be injected into the corresponding injection points of the next injection-locked oscillator. Some embodiments reduce deterministic jitter by dynamically modifying the loop length of an injection-locked oscillator, and/or by using a duty cycle corrector, and/or by multiplexing/blending the outputs from multiple delay elements of an injection-locked oscillator.

A circuit includes a first differential ring-type oscillator, a second differential ring-type oscillator, and a coupling structure. The coupling structure capacitively couples the first and second differential ring-type oscillators. A method of synchronizing the first and second differential ring-type oscillators is also disclosed.

A clock generator comprises a voltage controlled oscillator including a ring oscillator which has a plurality of differential inverter circuits connected in a ring shape, and a phase controller to control an output of a differential inverter circuit which belongs to a second group, in a first state or a second state, for a predetermined time period. The differential inverter circuit which belongs to the second group is distinct from a differential inverter circuit which belongs to a first group. The differential inverter circuit which belongs to the second group, in the first state, outputs a first logic signal from a first differential output terminal and outputs a second logic signal from a second differential output terminal. Further, the differential inverter circuit which belongs to the second group, in the second state, outputs the second logic signal from the first differential output terminal and outputs the first logic signal from the second differential output terminal.

A quadrature LC tank based digitally controlled ring oscillator (DCO). The oscillator structure incorporates a plurality of stages, each stage including a buffer and a series LC tank. Four stages are coupled together to create a 360 degree phase shift around a loop. The oscillation frequency of the oscillator is the same as the resonant frequency of each LC tank, therefore it avoids quality factor degradation of LC tanks found in the prior art. In one example embodiment, class-D amplifiers are used to drive each of the LC tanks. Capacitor banks before at the input and output of the buffers provide coarse and fine tuning of the frequency of oscillation. The high efficiency exhibited by these amplifiers results in very good phase noise performance of this oscillator. The oscillator utilizes a startup circuit to launch oscillation upon power on.

Representative implementations of devices and techniques provide reduced jitter for a controlled oscillator. An edge of a reference signal is injected at various points within the oscillator, and is replaced for an edge of the generated oscillation signal at the injection point.

A quadrature LC tank based digitally controlled ring oscillator (DCO). The oscillator structure incorporates a plurality of stages, each stage including a buffer and a series LC tank. Four stages are coupled together to create a 360 degree phase shift around a loop. The oscillation frequency of the oscillator is the same as the resonant frequency of each LC tank, therefore it avoids quality factor degradation of LC tanks found in the prior art. In one example embodiment, class-D amplifiers are used to drive each of the LC tanks. Capacitor banks before at the input and output of the buffers provide coarse and fine tuning of the frequency of oscillation. The high efficiency exhibited by these amplifiers results in very good phase noise performance of this oscillator. The oscillator utilizes a startup circuit to launch oscillation upon power on.

A method for performing phase shift control for timing recovery in an electronic device and an associated apparatus are provided, where the method includes: generating an output signal of an oscillator, wherein a phase shift of the output signal of the oscillator is controlled by selectively combining a set of clock signals into the oscillator according to a set of digital control signals, and the set of clock signals is obtained from a clock generator, wherein the phase shift corresponds to the set of digital control signals, and the set of digital control signals carries a set of digital weightings for selectively mixing the set of clock signals; and performing timing recovery and sampling on a receiver input signal of a receiver in the electronic device according to the output signal of the oscillator to reproduce data from the receiver input signal.