A method for in-situ dry cleaning of a SiGe semiconductor surface, ex-situ degreases the Ge containing semiconductor surface and removes organic contaminants. The surface is then dosed with HF (aq) or NH.sub.4F (g) generated via NH.sub.3+NH or NF.sub.3 with H.sub.2 or H.sub.2O to remove oxygen containing contaminants. In-situ dosing of the SiGe surface with atomic H removes carbon containing contaminants.

A method of controlling the thickness of gate oxides in an integrated CMOS process which includes performing a two-step gate oxidation process to concurrently oxidize and therefore consume at least a first portion of the cap layer of the NV gate stack to form a blocking oxide and form a gate oxide of at least one metal-oxide-semiconductor (MOS) transistor in the second region, wherein the gate oxide of the at least one MOS transistor is formed during both a first oxidation step and a second oxidation step of the gate oxidation process.

A semiconductor device includes: a semiconductor substrate; a gate electrode on the semiconductor substrate; a SiN film on the semiconductor substrate and the gate electrode; and an oxide film on the SiN film, wherein the oxide film is an atomic layer deposition film including atomic layers alternately deposited.

There is provided a technique that includes: (a) forming an inhibitor layer on a surface of a first material of a concave portion provided on a surface of a substrate, by supplying a precursor to the substrate to adsorb at least a portion of a molecular structure of molecules constituting the precursor on the surface of the first material of the concave portion, the concave portion being composed of the first material containing a first element and a second material containing a second element different from the first element; (b) growing a film on a surface of the second material of the concave portion by supplying a film-forming material to the substrate having the inhibitor layer formed on the surface of the first material; and (c) forming a hydroxyl group termination on the surface of the first material before performing (a).

A method of reducing silicon consumption of a silicon material. The method comprises cleaning a silicon material and subjecting the cleaned silicon material to a vacuum anneal at a temperature below a melting point of silicon and under vacuum conditions. The silicon material is subjected to additional process acts without substantially removing silicon of the silicon material. Additional methods of forming a semiconductor structure and forming isolation structures are also disclosed.

An insulating layer structure for a semiconductor product. The insulating layer structure includes a device substrate, a supporting substrate and a thin film layer. The device substrate and the supporting substrate are silicon wafers. The thin film layer(s) is/are arranged on the device substrate or/and the supporting substrate. The device substrate and the supporting substrate are bonded together through the thin film layer arranged on at least one of the device substrate and the supporting substrate to form an integral multilayer SOI structure. The insulating layer structure formed by the present invention solves problems of serious spontaneous heating of an existing SOI device, severe warpage of an existing SOI structure caused by high-temperature annealing, a poor radio frequency characteristic and the like, and has a predictable relatively higher economic and social value.

Methods are provided for selective film deposition. One method includes providing a substrate containing a dielectric material and a metal layer, the metal layer having an oxidized metal layer thereon, coating the substrate with a metal-containing catalyst layer, treating the substrate with an alcohol solution that removes the oxidized metal layer from the metal layer along with the metal-containing catalyst layer on the oxidized metal layer, and exposing the substrate to a process gas containing a silanol gas for a time period that selectively deposits a SiO.sub.2 film on the metal-containing catalyst layer on the dielectric material.

Disclosed are apparatuses and methods for providing a substrate onto a substrate support in a processing chamber, generating an inert plasma in the processing chamber, and maintaining the inert plasma to heat the substrate to a steady state temperature, suitable for conducting plasma-enhanced chemical vapor deposition (PECVD), in less than 30 seconds from providing the substrate onto the substrate support. An apparatus may include a processing chamber, a process station that includes a substrate support, a process gas unit configured to flow an inert gas onto a substrate supported by the substrate support, a plasma source configured to generate an inert plasma in the process station, and a controller with instructions configured to flow the inert gas onto the substrate, generate the inert plasma in the first process station, and maintain the inert plasma to thereby heat the substrate.

A method of forming a graphene structure, includes: providing a substrate; performing a preprocessing by supplying a first processing gas including a carbon-containing gas to the substrate while heating the substrate, without using plasma; and after the preprocessing, forming the graphene structure on a surface of the substrate through a plasma CVD using plasma of a second processing gas including a carbon-containing gas.

Disclosed is a method and a system of passivating a cleaved semiconductor structure for utilization as an edge-emitting laser device. The method includes providing an enclosure having a first chamber and a second chamber, a transfer arm to receive and transfer a given structure, and a fixture to mount the given structure thereon in the second chamber. The method further includes loading the cleaved semiconductor structure defining a first facet, in the first chamber, onto the transfer arm therein, transferring the cleaved semiconductor structure using the transfer arm, exposing the first facet of the cleaved semiconductor structure to a cleaning beam from a cleaning source, and exposing the first facet of the cleaved semiconductor to an oxidation agent from an oxidizing source to form an ordered oxide layer on the first facet of the cleaved semiconductor structure.