H01L21/304

Fabrication of high-aspect ratio nanostructures by localized nanospalling effect

In this work is presented a method for fabrication of high-aspect ratio structures through spalling effect. The spalling is achieved through lithography, etching and sputtering processes, thus providing the flexibility to position the spalled structures according to the application requirements. This method has been successfully demonstrated for metal-oxides and metals. The width of the fabricated structures is dependent on the thickness of the film deposited by sputtering, where structures as small as 20 nm in width have been obtained.

TREATMENT LIQUID AND TREATMENT LIQUID CONTAINER
20230017832 · 2023-01-19 · ·

The present invention provides a treatment liquid that allows a treated portion to have excellent smoothness in a case where SiGe is etched with the treatment liquid. The present invention also provides a treatment liquid container relating to the treatment liquid.

The treatment liquid according to an embodiment of the present invention contains a fluoride ion source, an oxidant, and an additive, in which the additive is one or more kinds of substances selected from the group consisting of predetermined compounds.

METHOD OF PROCESSING WAFER
20230015352 · 2023-01-19 ·

A method of processing a wafer having a plurality of devices formed in respective areas on a face side of the wafer, the areas being demarcated by a plurality of intersecting projected dicing lines, includes a resin applying step of coating the face side of the wafer with a liquid resin to cover an area of the wafer where the plurality of devices are present, a resin curing step of curing the liquid resin into a protective film, and a planarizing step of planarizing the protective film.

METHOD OF PROCESSING WAFER
20230015352 · 2023-01-19 ·

A method of processing a wafer having a plurality of devices formed in respective areas on a face side of the wafer, the areas being demarcated by a plurality of intersecting projected dicing lines, includes a resin applying step of coating the face side of the wafer with a liquid resin to cover an area of the wafer where the plurality of devices are present, a resin curing step of curing the liquid resin into a protective film, and a planarizing step of planarizing the protective film.

LAMINATED DEVICE WAFER FORMING METHOD

A laminated device wafer forming method includes a laminating step of laminating a first device wafer and a second device wafer to each other, the laminating step including a position adjusting step of imaging, by an imaging unit, a first predetermined line formed on a peripheral portion on the front surface side of the first device wafer and located outside rectangular regions corresponding to devices and a second predetermined line formed on a peripheral portion on the front surface side of the second device wafer and located outside the rectangular regions corresponding to the devices, and adjusting relative positions of the first device wafer and the second device wafer by using the first predetermined line and the second predetermined line.

SEMICONDUCTOR STRUCTURE FABRICATION METHOD, SEMICONDUCTOR STRUCTURE AND MEMORY
20230015307 · 2023-01-19 ·

The present application provides a semiconductor structure fabrication method, a semiconductor structure and a memory. The semiconductor structure fabrication method includes: providing a substrate, the substrate including a first surface and a second surface opposite to each other; forming a first dielectric layer on the first surface of the substrate, wherein semiconductor devices are formed in the first dielectric layer; forming first trenches extending into the substrate in the first dielectric layer; forming a first barrier layer on the first dielectric layer, the first barrier layer covering inner walls of the first trenches and a surface of the first dielectric layer; forming second trenches corresponding to the first trenches on the second surface of the substrate; and forming a second barrier layer on the substrate, the second barrier layer covering the second surface and inner walls of the second trenches.

SEMICONDUCTOR STRUCTURE FABRICATION METHOD, SEMICONDUCTOR STRUCTURE AND MEMORY
20230015307 · 2023-01-19 ·

The present application provides a semiconductor structure fabrication method, a semiconductor structure and a memory. The semiconductor structure fabrication method includes: providing a substrate, the substrate including a first surface and a second surface opposite to each other; forming a first dielectric layer on the first surface of the substrate, wherein semiconductor devices are formed in the first dielectric layer; forming first trenches extending into the substrate in the first dielectric layer; forming a first barrier layer on the first dielectric layer, the first barrier layer covering inner walls of the first trenches and a surface of the first dielectric layer; forming second trenches corresponding to the first trenches on the second surface of the substrate; and forming a second barrier layer on the substrate, the second barrier layer covering the second surface and inner walls of the second trenches.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR MANUFACTURING DEVICE, AND SYSTEM

In a method of manufacturing a semiconductor device, the method includes: applying a liquid material containing an ionic liquid on a substrate to form a protective film; transferring at an atmosphere the substrate on which the protective film is formed; and removing the protective film from the substrate that has been transferred at the atmosphere.

COMPOSITION AND METHOD FOR TREATING SUBSTRATE
20230223272 · 2023-07-13 · ·

The present invention provides a composition having an excellent dissolving ability for a transition metal-containing substance and a method for treating a substrate. The composition according to an embodiment of the present invention contains at least one oxohalogen acid compound selected from the group consisting of hypochlorous acid, chlorous acid, chloric acid, bromic acid, and salts thereof and a compound represented by Formula (1), in which a content of the compound represented by Formula (1) is 1.0% to 25.0% by mass with respect to a total mass of the composition.

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Electrode with alloy interface

An electrode structure with an alloy interface is provided. In one aspect, a method of forming a contact structure includes: patterning a via in a first dielectric layer; depositing a barrier layer onto the first dielectric layer, lining the via; depositing and polishing a first metal layer (Element A) into the via to form a contact in the via; depositing a second metal layer (Element B) onto the contact in the via; annealing the first and second metal layers under conditions sufficient to form an alloy AB; depositing a third metal layer onto the second metal layer; patterning the second and third metal layers into a pedestal stack over the contact to form an electrode over the contact, wherein the alloy AB is present at an interface of the electrode and the contact; and depositing a second dielectric that surrounds the pedestal stack. A contact structure is also provided.