In a chemical mechanical polishing system, a platen shield cleaning assembly is installed on a rotatable platen in a gap between the rotatable platen and a platen shield. The assembly includes a sponge holder attached to the platen and a sponge. The sponge is held by the sponge holder such that an outer surface of the sponge is pressed against an inner surface of the platen shield.

The substrate processing apparatus includes a suction holding mechanism, a rotation mechanism, a plurality of lift pins, a vertical movement mechanism, and a horizontal movement mechanism. The suction holding mechanism sucks and holds a substrate. The rotation mechanism rotates the suction holding mechanism holding the substrate about the rotation axis. The vertical movement mechanism moves the plurality of lift pins in the vertical direction. A sensor measures the eccentric state of the substrate W held by the suction holding mechanism. The vertical movement mechanism supports the substrate from the suction holding mechanism by moving the plurality of lift pins and the horizontal movement mechanism moves the plurality of lift pins based on the eccentric state of the substrate measured by the sensor in a state where the substrate is supported.

The present invention relates to a substrate cleaning apparatus, a polishing apparatus, a buffing apparatus, a substrate processing apparatus, a machine learning apparatus used for any of these apparatuses, and a substrate cleaning method, which are improved in terms of both performance and throughput. The substrate cleaning apparatus (16) includes: a cleaning tool (77) configured to clean a substrate (W) held by a substrate holder (71, 72, 73, 74); a surface-property measuring device configured to obtain surface data of the cleaning tool (77); and a controller (30) configured to determine a replacement time of the cleaning tool (77) based on the surface data. The surface-property measuring device is configured to obtain surface data of the cleaning tool (77) at at least two measurement points (PA, PB) of the cleaning tool (77) each time a predetermined number of substrates (W) are scrubbed, and the controller (30) is configured to determine the replacement time of the cleaning tool (77) based on a difference in the surface data obtained.

The dilute chemical solution supply device 1 comprises: a dilute chemical solution preparation unit 2 that prepares a dilute chemical solution W1; a reservoir 3 for the prepared dilute chemical solution; a dilute chemical solution adjustment/supply mechanism 4 that supplies, as washing water W2, the dilute chemical solution W1 stored in the reservoir 3 to a plurality of single-wafer type washers 5A, 5B, and 5C; and a return mechanism that is connected to each of the single-wafer type washers 5A, 5B, and 5C and refluxes excess water from the single-wafer type washers to the reservoir 3. According to such a dilute chemical solution supply device, it is possible to accurately adjust the concentration of the solute of the dilute chemical solution and suppress the discharge of excess water, and the dilute chemical solution supply device is thus suitable for washing of wafers, etc.

A facet region detection method includes a first irradiation step and a second irradiation step in which a first surface and a second surface, respectively, of an ingot are irradiated with light, and a first fluorescence detection step and a second fluorescence detection step in which distribution of the number of photons of fluorescence in the first surface and the second surface, respectively, is obtained. The facet region detection method further includes a first determination step and a second determination step in which a facet region and a non-facet region are determined in the first surface and the second surface on a basis of the number of photons of the fluorescence, and a calculation step in which an estimated position of a facet region inside the ingot is calculated based on the facet region in the first surface and the facet region in the second surface.

A facet region detection method includes a first irradiation step and a second irradiation step in which a first surface and a second surface, respectively, of an ingot are irradiated with light, and a first fluorescence detection step and a second fluorescence detection step in which distribution of the number of photons of fluorescence in the first surface and the second surface, respectively, is obtained. The facet region detection method further includes a first determination step and a second determination step in which a facet region and a non-facet region are determined in the first surface and the second surface on a basis of the number of photons of the fluorescence, and a calculation step in which an estimated position of a facet region inside the ingot is calculated based on the facet region in the first surface and the facet region in the second surface.

A system in package includes a memory-die stack in memory module that is stacked vertically with respect to a processor die. Each memory die in the memory-die stack includes a vertical bond wire that emerges from a matrix for connection. Some configurations include the vertical bond wire emerging orthogonally beginning from a bond-wire pad. The matrix encloses the memory-die stack, the spacer, and at least a portion of the processor die.

A system in package includes a memory-die stack in memory module that is stacked vertically with respect to a processor die. Each memory die in the memory-die stack includes a vertical bond wire that emerges from a matrix for connection. Some configurations include the vertical bond wire emerging orthogonally beginning from a bond-wire pad. The matrix encloses the memory-die stack, the spacer, and at least a portion of the processor die.

Methods and apparatus for pre-treating semiconductor wafers before edge trimming to enhance wafer edge quality prior to thinning the semiconductor wafers from an initial thickness, and increasing yield post-thinning of the pre-treated, edge trimmed semiconductor wafers.

Methods and apparatus for pre-treating semiconductor wafers before edge trimming to enhance wafer edge quality prior to thinning the semiconductor wafers from an initial thickness, and increasing yield post-thinning of the pre-treated, edge trimmed semiconductor wafers.