Patent classifications
H01L21/306
METHOD FOR MANUFACTURING ABRASIVE GRAINS, COMPOSITION FOR CHEMICAL MECHANICAL POLISHING, AND METHOD FOR CHEMICAL MECHANICAL POLISHING
Provided are abrasive grains and a composition for chemical mechanical polishing which are for selectively polishing a silicon nitride film, and which are applicable not only to silicon oxide films but also to amorphous silicon films and polysilicon films. This method for manufacturing abrasive grains includes: a first step of heating a mixture which contains particles having a sulfanyl group (—SH) fixed to the surface thereof via covalent bonds, and which contains a compound having carbon-carbon unsaturated double bonds; and a second step, which is performed after the first step, of further adding a peroxide and carrying out heating.
COMPOSITION AND METHOD FOR TREATING SUBSTRATE
The present invention provides a composition having an excellent dissolving ability for a transition metal-containing substance and a method for treating a substrate. The composition according to an embodiment of the present invention contains at least one oxohalogen acid compound selected from the group consisting of hypochlorous acid, chlorous acid, chloric acid, bromic acid, and salts thereof and a compound represented by Formula (1), in which a content of the compound represented by Formula (1) is 1.0% to 25.0% by mass with respect to a total mass of the composition.
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Plasma processing method and plasma processing apparatus
A plasma processing apparatus which forms a first film on a pattern formed on a substrate having dense and coarse areas, and then performs sputtering or etching on the first film.
Semiconductor device and manufacturing method thereof
A semiconductor device including a FET includes an isolation insulating layer disposed in a trench of the substrate, a gate dielectric layer disposed over a channel region of the substrate, a gate electrode disposed over the gate dielectric layer, a source and a drain disposed adjacent to the channel region, and an embedded insulating layer disposed below the source, the drain and the gate electrode and both ends of the embedded insulating layer are connected to the isolation insulating layer.
METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
A method for manufacturing a semiconductor structure and the semiconductor structure are provided. In the method, a first wafer is provided, in which the first wafer has a first side and a second side opposite to each other, and a first conductive structure is provided in the first wafer, and an end of the first conductive structure is located in the first wafer. The first wafer is thinned from the second side along a direction perpendicular to the first side, until a thickness of the remaining first wafer reaches a preset thickness to expose the end of the first conductive structure. The thinning includes performing film peeling at least once. In the film peeling, hydrogen ion implantation is performed on the second side to form a hydrogen ion-containing layer in the first wafer; and the first wafer is heated to cause the hydrogen ion-containing layer to fall off.
CMP SLURRY COMPOSITION FOR POLISHING TUNGSTEN PATTERN WAFER AND METHOD OF POLISHING TUNGSTEN PATTERN WAFER USING THE SAME
A CMP slurry composition for polishing a tungsten pattern wafer and a method of polishing a tungsten pattern wafer, the CMP slurry composition includes a solvent; an abrasive agent containing silica modified with a silane compound having at least one nitrogen atom; and an alkylene oxide group-containing fluorine surfactant.
Low turn-on voltage GaN diodes having anode metal with consistent crystal orientation and preparation method thereof
A low turn-on voltage GaN diode having an anode metal with a consistent crystal orientation and a preparation method thereof. The low turn-on voltage GaN diode having an anode metal with a consistent crystal orientation provided by the present disclosure includes a substrate layer, a GaN buffer layer, a GaN channel layer and an AlGaN barrier layer, which are arranged in sequence from bottom to top; a cathode arranged on the AlGaN barrier layer; a groove arranged in the GaN channel layer and the AlGaN barrier layer, and an anode provided on a bottom and a side wall of the groove and part of the AlGaN barrier layer; a dielectric layer provided on an uncovered portion of the AlGaN barrier layer; wherein, a contact portion of the anode with the groove and the AlGaN barrier layer is W or Mo metal with a crystal orientation of <100>.
Method for the controlled removal of a protective layer from a surface of a component
A method 14 for the controlled removal of a protective layer 3 from a surface of a component 10, wherein the component comprises: a base body 1; an intermediate layer 2, which at least partially covers the base body; and said protective layer 3, which comprises an amorphous solid, in particular an amorphous nonmetal, in particular amorphous ceramic, and at least partially covers the intermediate layer;
wherein the method comprises the following steps: bringing 11 the protective layer 3 into contact with an etching or solvent medium 4; and removing 12 the protective layer 3 under the action of the etching or solvent medium 4 until the intermediate layer 2 is exposed;
and wherein the etching or solvent medium causes a first etching or dissolving speed of the protective layer and a second etching or dissolving speed of the intermediate layer and wherein the first etching or dissolving speed is greater than the second etching or dissolving speed. The invention furthermore relates to a method for replacing an old protective layer on a component, a method for operating a thin-film process facility, a component for use in a thin-film process facility, and a production method for the component.
Isolation structure having different distances to adjacent FinFET devices
A first FinFET device includes first fin structures that extend in a first direction in a top view. A second FinFET device includes second fin structures that extend in the first direction in the top view. The first FinFET device and the second FinFET device are different types of FinFET devices. A plurality of gate structures extend in a second direction in the top view. The second direction is different from the first direction. Each of the gate structures partially wraps around the first fin structures and the second fin structures. A dielectric structure is disposed between the first FinFET device and the second FinFET device. The dielectric structure cuts each of the gate structures into a first segment for the first FinFET device and a second segment for the second FinFET device. The dielectric structure is located closer to the first FinFET device than to the second FinFET device.
Substrate hydrophilizing agent
Provided is a substrate hydrophilizing agent that improves the wettability of a substrate surface with respect to a photoresist. A substrate hydrophilizing agent of the present invention is an agent for hydrophilizing a surface of a substrate on which a pattern is formed through photolithography, and contains at least the following Component (A) and Component (B). Component (A): a water-soluble oligomer having a weight average molecular weight from 100 to less than 10000. Component (B): water. The water-soluble oligomer of Component (A) is preferably a compound represented by the following Formula (a-1):
R.sup.a1O—(C.sub.3H.sub.6O.sub.2).sub.n—H (a-1)
(where R.sup.a1 represents a hydrogen atom, a hydrocarbon group which may have a hydroxyl group, or an acyl group; and n is an integer from 2 to 60.)