H01L21/3221

Phosphorus Fugitive Emission Control

A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.

Vertical power semiconductor device including a field stop region having a plurality of impurity peaks

A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a semiconductor body having a first main surface and a second main surface opposite to the first main surface along a vertical direction. The vertical power semiconductor device further includes a drift region in the semiconductor body. The drift region includes platinum atoms. The vertical power semiconductor device further includes a field stop region in the semiconductor body between the drift region and the second main surface. The field stop region includes a plurality of impurity peaks. A first impurity peak of the plurality of impurity peaks has a larger concentration than a second impurity peak of the plurality of impurity peaks. The first impurity peak includes hydrogen and the second impurity peak includes helium.

SEMICONDUCTOR DEVICE
20220149159 · 2022-05-12 ·

Provided is a semiconductor device including: a semiconductor substrate having upper and lower surfaces and throughout which a first-conductivity-type bulk donor is distributed; a first-conductivity-type high concentration region including a center position in a depth direction of the substrate and having a donor concentration higher than a doping concentration of the donors; and an upper surface side oxygen reduction region provided in contact with the upper surface inside the substrate and in which an oxygen chemical concentration decreases as approaching the upper surface. The oxygen chemical concentration distribution may have a maximum value region where the oxygen chemical concentration is 50% or more of the maximum value, a first peak of an impurity chemical concentration may be arranged in an end of the high concentration region in the depth direction, and the peak may be arranged on the upper surface side with respect to or in the maximum value region.

SILICON WAFER AND METHOD FOR PRODUCING SILICON WAFER

A silicon wafer is provided which is a Czochralski wafer formed of silicon, and a method for producing the silicon wafer are provided. The wafer includes a bulk layer having an oxygen concentration of 0.5×10.sup.18/cm.sup.3 or more; and a surface layer extending from the surface of the wafer to 300 nm in depth, and having an oxygen concentration of 2×10.sup.18/cm.sup.3 or more.

Carbon-doped silicon single crystal wafer and method for manufacturing the same

A method for manufacturing a carbon-doped silicon single crystal wafer, including steps of: preparing a silicon single crystal wafer not doped with carbon; performing a first RTA treatment on the silicon single crystal wafer in an atmosphere containing compound gas; performing a second RTA treatment at a higher temperature than the first RTA treatment; cooling the silicon single crystal wafer after the second RTA treatment; and performing a third RTA treatment. The crystal wafer is modified to a carbon-doped silicon single crystal wafer, sequentially from a surface thereof: a 3C-SiC single crystal layer; a carbon precipitation layer; a diffusion layer of interstitial carbon and silicon; and a diffusion layer of vacancy and carbon. A carbon-doped silicon single crystal wafer having a surface layer with high carbon concentration and uniform carbon concentration distribution to enable wafer strength enhancement; and a method for manufacturing the carbon-doped silicon single crystal wafer.

Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate
11173697 · 2021-11-16 · ·

A method is disclosed for promoting the formation of uniform platelets in a monocrystalline semiconductor donor substrate by irradiating the monocrystalline semiconductor donor substrate with light. The photon-absorption assisted platelet formation process leads to uniformly distributed platelets with minimum built-in stress that promote the formation a well-defined cleave-plane in the subsequent layer transfer process.

GETTERING LAYER FORMING DEVICE AND PROCESSING APPARATUS
20230321781 · 2023-10-12 ·

A gettering layer forming device includes a spinner table having a surface for holding a face side of a wafer, and an annular rest surface disposed radially outwardly of the holding surface. An annular member is located on the rest surface surrounding the wafer such that a water bath is defined by the annular member and the wafer. A moving mechanism selectively places the annular member onto the rest surface and moves the annular member away from the rest surface, an abrasive grain nozzle charges free abrasive grains into the water bath, a water nozzle supplies water to the water bath to immerse the wafer in the water, an ultrasonic horn propagates ultrasonic vibrations to the free abrasive grains in the water, and a horizontally moving mechanism moves the ultrasonic horn and the holding table horizontally relative to each other in directions parallel to the holding surface.

Thermal processing method for silicon wafer

A processing temperature T.sub.S by a rapid thermal processing furnace is 1250° C. or more and 1350° C. or less, and a cooling rate R.sub.d from the processing temperature is in a range of 20° C./s or more and 150° C./s or less, and thermal processing is performed by adjusting the processing temperature T.sub.S and the cooling rate R.sub.d within a range between the upper limit P=0.00207T.sub.S.Math.R.sub.d−2.52R.sub.d+13.3 (Formula (A)) and the lower limit P=0.000548T.sub.S.Math.R.sub.d−0.605R.sub.d−0.511 (Formula (B)) of an oxygen partial pressure P in a thermal processing atmosphere.

EPITAXIAL SILICON WAFER, METHOD FOR PRODUCING SAME, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
20230317761 · 2023-10-05 · ·

A method of producing an epitaxial silicon wafer includes irradiating a surface of a silicon wafer with a beam of cluster ions containing SiH.sub.x ions (at least one of the integers 1 to 3 is selected as x of the SiH.sub.x ions) and C.sub.2H.sub.y ions (at least one of the integers 2 to 5 is selected as y of the C.sub.2H.sub.y ions) to form a modified layer that is located in a surface layer portion of the silicon wafer and that contains as a solid solution of the constituent elements of the cluster ion beam, and further includes forming a silicon epitaxial layer on the modified layer of the silicon wafer. The dose of the SiH.sub.x ions is 1.5×10.sup.14 ions/cm.sup.2 or more.

Epitaxial wafer manufacturing method and epitaxial wafer

Provided is an epitaxial wafer having an excellent gettering capability and a suppressed formation of epitaxial defects. The epitaxial wafer has a specified resistivity, and includes a modifying layer formed on a surface portion of the silicon wafer and composed of a predetermined element including at least carbon, in the form of a solid solution in the silicon wafer; and an epitaxial layer having a resistivity that is higher than the resistivity of the silicon wafer, wherein a concentration profile of the predetermined element in the modifying layer in a depth direction thereof meets a specified full width half maximum and a specified peak concentration.