A method of manufacturing a wafer. The method includes providing a wafer that includes a plurality of semiconductor device structures, and testing at least one of the plurality of semiconductor device structures. Based on a test result, a liquid is provided on a selected portion of the wafer to selectively alter at least one circuit element within the at least one of the plurality of semiconductor device structures.

A substrate processing apparatus includes a processing tank, a reservoir, a remover, a mixer, and a return path. Etching is performed on a substrate in the processing tank by immersing the substrate in a processing liquid containing a chemical liquid and silicon. The reservoir recovers and stores the processing liquid discharged from the processing tank. The remover recovers a portion of the processing liquid discharged from the processing tank, and removes silicon from the recovered processing liquid. The mixer mixes the processing liquid stored in the reservoir with the processing liquid from which silicon has been removed by the remover. The processing liquid mixed by the mixer is returned to the processing tank through a return path.

A substrate processing method includes forming a liquid film of an alkaline processing liquid on a substrate by supplying the alkaline processing liquid having a reduced oxygen concentration onto the substrate; and etching the substrate by rotating the substrate while supplying the alkaline processing liquid in a state that the liquid film having a given thickness is formed on the substrate.

A substrate polishing apparatus is disclosed that includes a polishing platform having two or more zones, each zone adapted to receive a different slurry component. A substrate polishing system is provided having a holder to hold a substrate, a polishing platform having a polishing pad, and a distribution system adapted to dispense, in a timed sequence, at least two different slurry components selected from a group consisting of an oxidation slurry component, a material removal slurry component, and a corrosion inhibiting slurry component. Polishing methods and systems adapted to polish substrates are provided, as are numerous other aspects.

The present invention relates to a substrate processing heater device that heats a substrate to process the substrate and a substrate solution processing device including the same. The substrate processing heater device includes a heater part having an opposite surface with a size greater than that of a processing surface of the substrate to heat the substrate and a lamp part comprising a plurality of lamp units disposed adjacent to each other on the heater part. Thus, since the opposite surface of the heater part has the size greater than that of the processing surface of the substrate, and the plurality of lamp units are disposed adjacent to each other, a heating temperature may be uniformly maintained on the processing surface of the substrate to prevent the substrate processing surface from being non-uniformly processed, thereby improving substrate processing efficiency.

A semiconductor memory device includes a first region where a plurality of conductive layers, a plurality of insulating layers, a semiconductor layer, and a gate insulating layer are formed and a second region different from the first region above a substrate. The plurality of conductive layers include a plurality of first conductive layers and a plurality of second conductive layers. The semiconductor memory device includes a plurality of first films different from the first conductive layers disposed in same layers as the plurality of first conductive layers in the second region and a plurality of second films different from the second conductive layers and the first films disposed in same layers as the plurality of second conductive layers in the second region.

Provided is a substrate processing system and a substrate processing method. The substrate processing system includes a polishing part for performing a Chemical Mechanical Polishing (CMP) process on a substrate, a cleaning part for cleaning the substrate on which the polishing process is performed, and a substrate transferring part for transferring the substrate to the cleaning part before polishing the substrate in the polishing part. The substrate may be preparatorily cleaned in the cleaning part before the polishing process, and then enters the polishing part.

The collection chamber apparatus acts to separate multiple fluids during the wafer processing cycle. Round, fluid collection trays surround the round wafer to collect each individual fluid, recycling them for later reuse. The trays move up and down by use of air cylinders and stack into each other to prevent cross contamination of the other fluids. Two opposing pistons (air cylinders) lift the trays in pairs to form fluid collection chambers. Each collection chamber has a unique drain which enters a separation manifold, flowing into separate tanks for later reuse.

An integrated circuit (IC) device includes a lower electrode including a main portion having a sidewall with at least one step portion, and a top portion having a width less than that of the main portion in a lateral direction. An upper support pattern contacts the top portion of the lower electrode. The upper support pattern includes a seam portion. To manufacture an IC device, a mold pattern and an upper sacrificial support pattern through which a plurality of holes pass are formed on a substrate. A plurality of lower electrodes are formed inside the plurality of holes. A peripheral space is formed on the mold pattern. An enlarged peripheral space is formed by reducing a width and a height of the top portion. An upper support pattern is formed to fill the enlarged peripheral space.

Disclosed is a semiconductor device for improving a gate induced drain leakage and a method for fabricating the same, and the method may include forming a trench in a substrate, lining a surface of the trench with an initial gate dielectric layer, forming a gate electrode to partially fill the lined trench, forming a sacrificial material spaced apart from a top surface of the gate electrode and to selectively cover a top corner of the lined trench, removing a part of the initial gate dielectric layer of the lined trench which is exposed by the sacrificial material in order to form an air gap, and forming a capping layer to cap a side surface of the air gap, over the gate electrode.