Patent classifications
H01L21/67075
Semiconductor device having an air gap and method for fabricating the same
Disclosed is a semiconductor device for improving a gate induced drain leakage and a method for fabricating the same, and the method may include forming a trench in a substrate, lining a surface of the trench with an initial gate dielectric layer, forming a gate electrode to partially fill the lined trench, forming a sacrificial material spaced apart from a top surface of the gate electrode and to selectively cover a top corner of the lined trench, removing a part of the initial gate dielectric layer of the lined trench which is exposed by the sacrificial material in order to form an air gap, and forming a capping layer to cap a side surface of the air gap, over the gate electrode.
SUBSTRATE PROCESSING APPARATUS
A substrate processing apparatus according to the present disclosure includes a gripping mechanism and a base plate. The gripping mechanism grips a peripheral edge of a substrate. The base plate is located below the substrate gripped by the gripping mechanism and supports the gripping mechanism. Furthermore, the base plate includes a liquid drain hole that discharges a processing liquid flowing from the substrate to an upper surface of the base plate through the gripping mechanism.
Warpage reduction
Examples described herein provide a method for reducing warpage when stacking semiconductor substrates. In an example, a first substrate is bonded with a second substrate to form a stack. The first substrate comprises a first semiconductor substrate, and the second substrate comprises a second semiconductor substrate. The second semiconductor substrate is thinned, and a first trench is etched into a backside of the thinned second semiconductor substrate. A first stressed material is deposited into the first trench.
ETCHING DEVICE AND ETCHING METHOD
The present invention provides an etching device which comprises an oxygen supplier, so that the etching device of the present invention can etch copper gently by means of the dissolved oxygen in the etching solution to accurately control the etching degree so as to fulfill the stricter requirements of microcircuit manufacturing. The present invention further provides an etching method. Finally, the etching waste solution of the present invention can be recycled to further ameliorate the environmental pollution and reduce the production cost, so the present invention is widely applicable in integrated circuit packaging.
MULTILAYER COATING FOR CORROSION RESISTANCE
Exemplary methods of coating a metal-containing component are described. The methods are developed to increase corrosion resistance and improve coating adhesion to a metal substrate. The methods include forming a bonding layer on a metal substrate, where the bonding layer includes an oxide of a metal in the metal substrate. The coating methods further include depositing a stress buffer layer on the bonding layer, where the stress buffer layer is characterized by a stress buffer layer coefficient of thermal expansion (CTE) that is less than a metal substrate CTE and a bonding layer CTE. The coating methods also include depositing an environmental barrier layer on the stress buffer layer, where a ratio of the metal substrate CTE to an environmental barrier layer CTE is greater than or about 20:1, and where the environmental barrier layer includes silicon oxide. The metal-containing components may be used in fabrication equipment for electronic devices.
Semiconductor device and method fabricating the same
A method for fabricating a semiconductor device, including the steps of: providing a substrate having an etch stop layer formed thereon; forming a preliminary stacked structure on the etch stop layer, the preliminary stacked structure including a lower sacrifice layer contacting the etch stop layer, a support layer, and an upper sacrifice layer; forming a hole penetrating the preliminary stacked structure and the etch stop layer; forming a conductive pattern in the hole; removing the upper sacrifice layer and a portion of the support layer; removing the lower sacrifice layer; forming a first conductive layer covering the conductive pattern; and forming a dielectric layer covering the first conductive layer, a remaining portion of the support layer, and the etch stop layer.
SEMICONDUCTOR EDGE PROCESSING APPARATUS AND METHODS
An apparatus for processing an edge surface of a wafer comprises a lower chamber having a first supporting area configured to support the wafer, an upper chamber having a second supporting area, and a first channel formed by the first supporting area, the second supporting area and peripheral areas thereof. The upper chamber is engaged with the lower chamber to position the wafer between the first supporting area and the second supporting area. The first channel is configured to provide a first space to flow one or more chemical fluids for etching an edge area of the wafer. The upper chamber comprises a protrusion part being configured to resist against an outer edge of the wafer in order to align the central axis of the wafer with the central axis of the second supporting area. This disclosure can process the edge of wafers.
TWO-STEP DECAPSULATION TECHNIQUE FOR SEMICONDUCTOR PACKAGE HAVING SILVER BOND WIRES
In one embodiment, a method includes: laser ablating an encapsulant of a semiconductor package, until a threshold amount of the encapsulant remains above one or more die of the semiconductor package; and providing at least one drop of acid onto a surface of the ablated semiconductor package to acid etch for a first time duration, to remove a remaining portion of the encapsulant above the one or more die, where after the acid etch, a die of interest is exposed and the silver bond wires of the semiconductor package are preserved.
Slurry distribution device for chemical mechanical polishing
An apparatus for chemical mechanical polishing includes a rotatable platen having a surface to support a polishing pad, a carrier head to hold a substrate in contact with the polishing pad, and a polishing liquid distribution system. The polishing liquid distribution system includes a dispenser positioned to deliver a polishing liquid to a portion of a polishing surface of the polishing pad, and a first barrier positioned before the portion of the polishing surface and configured to block used polishing liquid from reaching the portion of the polishing surface.
Wafer cleaning method and apparatus therefore
The present invention relates to a method for treating the surface of a wafer with multiple liquids, comprising rotating the surface of the wafer and discharging different liquid streams onto the rotating surface in a sequence from separate outlets, wherein the discharge of liquid streams which are contiguous in the sequence overlaps during a transition phase, and wherein during the transition phase the liquid streams merge after exiting said outlets to form a merged liquid stream before impacting the rotating surface. The invention also provides a liquid dispensing device incorporating a housing holding two or more liquid delivery tubes, wherein the tubes' outlets are inwardly angled towards one another, such that in use liquid streams delivered from the outlets of the two or more liquid delivery tubes merge to form a merged liquid stream.