A thin film transistor according to an exemplary embodiment includes: a substrate; a semiconductor layer disposed on the substrate and including a channel region, and an input region and an output region disposed on both sides of the channel region and doped with an impurity; a buffer layer disposed between the substrate and the semiconductor layer; a control electrode overlapping the semiconductor layer; a gate insulation layer disposed between the semiconductor layer and the control electrode; and an input electrode connected to the input region and an output electrode connected to the output region, wherein the semiconductor layer includes polysilicon and is crystallized by a blue laser scan.

Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.

A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.

Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.

A manufacturing apparatus and a manufacturing method are provided. A manufacturing apparatus includes a chamber, and a stage disposed in the chamber. The stage includes an upper surface on which a target substrate is disposed, a lower surface opposite to the upper surface, a first side surface extending between the upper surface and the lower surface in a first direction, and a second side surface extending between the upper surface and the lower surface in a second direction perpendicular to the first direction. The first side surface is in a round shape, and at least a portion of the first side surface is convex toward an outside of the stage.

An exemplary embodiment of the present disclosure provides a display device including: a substrate; a semiconductor layer disposed on the substrate; a first transistor including a first gate electrode disposed on the semiconductor layer; a light-emitting diode connected with the first transistor; and a first layer disposed between the substrate and the semiconductor layer, wherein the semiconductor layer includes a first electrode, a second electrode, and a channel disposed between the first electrode and the second electrode, the channel includes an impurity, and the first layer overlaps the first transistor.

The present disclosure relates to an array substrate and a method for manufacturing the array substrate. The array substrate includes a substrate having a display region and a peripheral region surrounding the display region, the display region including sub-pixels arranged in an array, and a plurality of thin film transistors located on the substrate, including a plurality of first thin film transistors located within the peripheral region and a second thin film transistor located within each sub-pixel of the display region, wherein there is a first distance in a row and/or column direction between first active layers of the first thin film transistors and second active layers of nearest neighbor second thin film transistors, and there is a second distance in a row and/or column direction between adjacent second active layers, wherein the first distance is substantially equal to the second distance.

A manufacturing apparatus and a manufacturing method are provided. A manufacturing apparatus includes a chamber, and a stage disposed in the chamber. The stage includes an upper surface on which a target substrate is disposed, a lower surface opposite to the upper surface, a first side surface extending between the upper surface and the lower surface in a first direction, and a second side surface extending between the upper surface and the lower surface in a second direction perpendicular to the first direction. The first side surface is in a round shape, and at least a portion of the first side surface is convex toward an outside of the stage.

A display device includes a base substrate; an oxide semiconductor layer disposed on the base substrate; a first gate insulating layer disposed on a first channel region of the oxide semiconductor layer and that overlaps the first channel region thereof; a first upper gate electrode disposed on the first gate insulating layer ; and an upper interlayer insulating layer disposed on the first upper gate electrode, the first upper gate electrode, and the oxide semiconductor layer, wherein the upper interlayer insulating layer includes a first upper interlayer insulating layer, a second upper interlayer insulating layer, and a third upper interlayer insulating layer, the first upper interlayer insulating layer includes silicon oxide, each of the second and third upper interlayer insulating layers include silicon nitride, and a hydrogen concentration in the second upper interlayer insulating layer is less than a hydrogen concentration in the third upper interlayer insulating layer.

A display apparatus includes a substrate, a gate electrode overlapping the substrate, and a semiconductor layer positioned between the substrate and the gate electrode. The semiconductor layer includes a first layer and a second layer positioned between the first layer and the gate electrode. A hydrogen content of the first layer is greater than a hydrogen content of the second layer.