A thin film transistor according to an exemplary embodiment includes: a substrate; a semiconductor layer disposed on the substrate and including a channel region, and an input region and an output region disposed on both sides of the channel region and doped with an impurity; a buffer layer disposed between the substrate and the semiconductor layer; a control electrode overlapping the semiconductor layer; a gate insulation layer disposed between the semiconductor layer and the control electrode; and an input electrode connected to the input region and an output electrode connected to the output region, wherein the semiconductor layer includes polysilicon and is crystallized by a blue laser scan.

An array substrate, includes: a substrate, a first metal layer, a first buffer layer, and an active layer, a gate insulating layer, a second metal layer, a first insulating layer, a third metal layer and a first planarization layer. The first metal layer is electrically connected with the first doped area of the active layer through the bridge layer of the second metal layer. The third metal layer is electrically connected with the second doped area of the active layer. The array substrate of the present disclosure reduces a size of a thin film transistor by stacking the first metal layer, the second metal layer, and the third metal layer, thereby increasing pixel density. A display panel is also provided.

A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. Agate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.

A display device includes: a substrate; a polycrystalline silicon film on the substrate; and a first buffer film between the substrate and the polycrystalline silicon film and having one surface contacting the polycrystalline silicon film and another surface opposite to the one surface, wherein the one surface of the first buffer film has a first root mean square (RMS) roughness range, and the first RMS roughness range is 1.5 nm or less.

The present invention is equipped with: a substrate (10) that has a surface upon which a drive circuit containing a TFT (20) is formed; a planarizing layer (30) that makes the surface of the substrate (10) planar by covering the drive circuit; and an organic light emitting element (40) that is provided with a first electrode (41) formed upon the surface of the planarization film and connected to the drive circuit, an organic light emitting layer (43) formed upon the first electrode, and a second electrode (44) formed upon the organic light emitting layer. In addition, the planarizing layer (30) includes a first inorganic insulating layer (31) and an organic insulating layer (32) that are layered upon the drive circuit, and the surface of the organic insulating layer (32) is formed with an arithmetic mean roughness Ra of no more than 50 nm.

An embodiment provides a manufacturing method of a polycrystalline silicon layer, including: forming a first amorphous silicon layer on a substrate; doping an N-type impurity into the first amorphous silicon layer; forming a second amorphous silicon layer on the n-doped first amorphous silicon layer; doping a P-type impurity into the second amorphous silicon layer; and crystalizing the n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer by irradiating a laser beam onto n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer to form a polycrystalline silicon layer.

A display device according to the present disclosure includes: a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate. A gate electrode of the thin film transistor with the top gate structure is provided in a same layer as a wire layer. A method of manufacturing a display device according to the present disclosure, the display device including a thin film transistor with a bottom gate structure and a thin film transistor with a top gate structure on a same substrate, includes: forming a. gate electrode of the thin film transistor with the top gate structure in a same layer as a wire layer.

Methods and systems for crystallizing a thin film provide a laser beam spot that is continually advanced across the thin film to create a sustained complete or partial molten zone that is translated across the thin film, and crystallizes to form uniform, small-grained crystalline structures or grains.

A method of manufacturing a display device including forming a polysilicon layer on a substrate, patterning the polysilicon layer to form a polysilicon pattern including a first region and a second region each having a first thickness, and a third region having a second thickness less than the first thickness, forming a gate insulation layer on the polysilicon pattern, forming a gate electrode on the gate insulation layer, partially implanting ions into the polysilicon pattern to form an active layer, forming an insulation interlayer on the gate electrode, forming source and drain contact holes each passing through the insulation interlayer and the gate insulation layer and respectively overlapping the first region and the second region, forming source and drain electrodes respectively filling the source and drain contact holes, and forming a light emitting element electrically connected to the source electrode or the drain electrode.

A display device includes a pixel disposed in a display region. The pixel includes a light-emitting element connected between a first power source and a second power source; a first transistor connected between the first power source and the light-emitting element to control a driving current flowing in the light-emitting element in response to a voltage of a first node; and at least one switching transistor to transmit a data signal or a voltage of an initialization power source to the first node. The switching transistor includes a first channel region, a first conductive region and a second conductive region which are respectively disposed at opposite sides of the first channel region, and a first wide band-gap region disposed between the first channel region and the second conductive region.