Patent classifications
H01L2224/27462
Carrier for an optoelectronic component, method of producing a carrier for an optoelectronic component, wafer and soldering method
A carrier for an optoelectronic component includes a main body, wherein the main body includes a first electrically conductive heating layer arrangement, a first solder layer for soldering an optoelectronic component to the main body is arranged on a first side of the main body, the first electrically conductive heating layer arrangement is electrically insulated from the first solder layer and thermally connected to the first solder layer, and the first heating layer arrangement has an exposed portion on which molten solder of the first solder layer can flow to reduce an electrical resistance of the first heating layer arrangement.
SOLDERING A CONDUCTOR TO AN ALUMINUM METALLIZATION
A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.
Method of Forming an Interconnection between an Electric Component and an Electronic Component
A method of forming an interconnection includes: providing an electronic component having a first main face and a first metallic layer disposed on the first main face; providing an electric component having a second main face and a second metallic layer disposed on the second main face, at least one of the first or second metallic layers including an oxide layer provided on a main face thereof; disposing a reducing agent on one or both of the electronic component and the electric component such that the reducing agent is enabled to remove the oxide layer; and connecting the electronic component to the electric component by directly connecting the first metallic layer of the electronic component with the second metallic layer of the electric component by applying pressure and heat.
Solar cell via thin film solder bond
A method of forming a solar cell device that includes forming a porous layer in a monocrystalline donor substrate and forming an epitaxial semiconductor layer on the porous layer. A solar cell structure is formed on the epitaxial semiconductor layer. A carrier substrate is bonded to the solar cell structure through a bonding layer. The monocrystalline donor substrate is removed by cleaving the porous layer. A grid of metal contacts is formed on the epitaxial semiconductor layer. The exposed portions of the epitaxial semiconductor layer are removed. The exposed surface of the solar cell structure is textured. The textured surface may be passivated, in which the passivated surface can provide an anti-reflective coating.
Solar cell via thin film solder bond
A method of forming a solar cell device that includes forming a porous layer in a monocrystalline donor substrate and forming an epitaxial semiconductor layer on the porous layer. A solar cell structure is formed on the epitaxial semiconductor layer. A carrier substrate is bonded to the solar cell structure through a bonding layer. The monocrystalline donor substrate is removed by cleaving the porous layer. A grid of metal contacts is formed on the epitaxial semiconductor layer. The exposed portions of the epitaxial semiconductor layer are removed. The exposed surface of the solar cell structure is textured. The textured surface may be passivated, in which the passivated surface can provide an anti-reflective coating.
CU-CU DIRECT WELDING FOR PACKAGING APPLICATION IN SEMICONDUCTOR INDUSTRY
Disclosed is a method of bonding two copper structures involving compressing a first copper structure with a second copper structure under a stress from 0.1 MPa to 50 MPa and under a temperature of 250 C. or less so that a bonding surface of the first copper structure is bonded to a bonding surface of the second copper structure; at least one of the bonding surface of the first copper structure and the bonding surface of the second copper structure have a layer of nanograins of copper having an average grain size of 5 nm to 500 nm, the layer of the nanograins of copper having a thickness of 10 nm to 10 m.
CHEMICAL MECHANICAL POLISHING FOR HYBRID BONDING
Representative implementations of techniques and methods include chemical mechanical polishing for hybrid bonding. The disclosed methods include depositing and patterning a dielectric layer on a substrate to form openings in the dielectric layer, depositing a barrier layer over the dielectric layer and within a first portion of the openings, and depositing a conductive structure over the barrier layer and within a second portion of the openings not occupied by the barrier layer, at least a portion of the conductive structure in the second portion of the openings coupled or contacting electrical circuitry within the substrate. Additionally, the conductive structure is polished to reveal portions of the barrier layer deposited over the dielectric layer and not in the second portion of the openings. Further, the barrier layer is polished with a selective polish to reveal a bonding surface on or at the dielectric layer.
Copper paste for pressureless bonding, bonded body and semiconductor device
A copper paste for pressureless bonding is a copper paste for pressureless bonding, containing: metal particles; and a dispersion medium, in which the metal particles include sub-micro copper particles having a volume average particle diameter of greater than or equal to 0.01 m and less than or equal to 0.8 m, and micro copper particles having a volume average particle diameter of greater than or equal to 2.0 m and less than or equal to 50 m, and the dispersion medium contains a solvent having a boiling point of higher than or equal to 300 C., and a content of the solvent having a boiling point of higher than or equal to 300 C. is greater than or equal to 2 mass % on the basis of a total mass of the copper paste for pressureless bonding.
Copper paste for pressureless bonding, bonded body and semiconductor device
A copper paste for pressureless bonding is a copper paste for pressureless bonding, containing: metal particles; and a dispersion medium, in which the metal particles include sub-micro copper particles having a volume average particle diameter of greater than or equal to 0.01 m and less than or equal to 0.8 m, and micro copper particles having a volume average particle diameter of greater than or equal to 2.0 m and less than or equal to 50 m, and the dispersion medium contains a solvent having a boiling point of higher than or equal to 300 C., and a content of the solvent having a boiling point of higher than or equal to 300 C. is greater than or equal to 2 mass % on the basis of a total mass of the copper paste for pressureless bonding.
Multi-chip package with high thermal conductivity die attach
A packaged semiconductor device includes a metal substrate having a first and second through-hole aperture having an outer ring, and metal pads around the apertures on dielectric pads. A first and second semiconductor die have a back side metal (BSM) layer on its bottom side are mounted top side up on a top portion of the apertures. A metal die attach layer is directly between the BSM layer and walls of the metal substrate bounding the apertures to provide a die attachment for the first and the second semiconductor die that fills a bottom portion of the apertures. Leads contact the metal pads, wherein the leads include a distal portion that extends beyond the metal substrate. Bondwires are between the metal pads and bond pads on the first and second semiconductor die, and a mold compound provides encapsulation for the packaged semiconductor device.