A package includes an integrated circuit that includes at least one active area and at least one secondary device area, a support configured to support the integrated circuit, and a die attach material. The integrated circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

A package includes an integrated circuit that includes at least one active area and at least one secondary device area, a support configured to support the integrated circuit, and a die attach material. The integrated circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, a die and a first adhesive layer; a surface of the substrate is provided with an insulation layer; the die is arranged on a surface of the insulation layer via the first adhesive layer; the insulation layer is provided with at least one hole slot; a position of the at least one hole slot corresponds to at least a part of an edge of the first adhesive layer; a second adhesive layer is arranged in the at least one hole slot; at least a part of a surface of the second adhesive layer is connected with the first adhesive layer; and an elasticity modulus of the second adhesive layer is smaller than an elasticity modulus of the first adhesive layer.

The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, a die and a first adhesive layer; a surface of the substrate is provided with an insulation layer; the die is arranged on a surface of the insulation layer via the first adhesive layer; the insulation layer is provided with at least one slot; a position of the at least one slot corresponds to at least a part of an edge of the first adhesive layer; a second adhesive layer is arranged in the at least one slot; at least a part of a surface of the second adhesive layer is connected with the first adhesive layer; and an elasticity modulus of the second adhesive layer is smaller than an elasticity modulus of the first adhesive layer.

Techniques are disclosed for facilitating interconnecting semiconductor devices. In one example, a method of interconnecting a first substrate to a second substrate is provided. The method includes forming a first plurality of contacts on the first substrate. The method further includes forming an insulative layer on the first substrate. The method further includes forming a second plurality of contacts on the second substrate. The method further includes joining the first plurality of contacts to the second plurality of contacts to form interconnects between the first substrate and the second substrate. When the first and second substrates are joined, at least a portion of each of the interconnects is surrounded by the insulative layer. Related systems and devices are also provided.

The present disclosure provides a method for preparing a semiconductor device with a composite dielectric structure. The method includes forming a photoresist pattern structure over a first semiconductor die. The method also includes forming a second dielectric layer surrounding the photoresist pattern structure, and removing the photoresist pattern structure to form a first opening in the second dielectric layer. The method further includes forming dielectric spacers along sidewalls of the first opening, and forming an interconnect structure surrounded by the dielectric spacers. In addition, the method includes bonding a second semiconductor die to the second dielectric layer. The second semiconductor die includes a second conductive pad facing the interconnect structure, and the second conductive pad is electrically connected to the first conductive pad of the first semiconductor die through the interconnect structure.

Provided is a printed circuit board using thermally and electrically conductive layer, and a manufacturing method thereof The manufacturing method for mounting a plurality of elements includes forming an electrode layer on a substrate of a PCB, forming a photo solder resist (PSR) layer in a patterned manner on a first area of the electrode layer; forming a conductive layer on the PSR layer in the patterned manner, the conductive layer being configured to conduct heat and static electricity; and mounting a plurality of elements on a second area of the side of the PCB, the second area being different from the first area.

A semiconductor device includes an interconnect structure disposed over a first semiconductor die. The first semiconductor die includes a semiconductor substrate and a first conductive pad disposed over the semiconductor substrate, and the first conductive pad is covered by the interconnect structure. The semiconductor device also includes dielectric spacers surrounding the interconnect structure. An interface between the dielectric spacers and the interconnect structure is curved. The semiconductor device further includes a dielectric layer surrounding the dielectric spacers, and a second semiconductor die bonded to the dielectric layer and the interconnect structure. The second semiconductor die includes a second conductive pad, and the interconnect structure is covered by the second conductive pad.