A method for minimizing an average surface includes: forming an epitaxial layer on a growth substrate; forming the soft metal layer on the epitaxial layer in which the average surface roughness of a bonding surface of the soft metal layer is greater than a first value; forming a glue layer on a carrier substrate; placing a combination of the glue layer and the carrier substrate on the bonding surface in which the glue layer being in contact with the bonding surface of the soft metal layer; and applying an external pressure to compress the glue layer and the soft metal layer such that the average surface roughness of the bonding surface of the soft metal layer is reduced from the first value to a second value, wherein the second value is less than 80 nm.

A bonding member (10) includes surface-processed silver surfaces (11a, 11b).

A semiconductor device includes a metal chip mounting member and a semiconductor chip bonded to the chip mounting member through a metal sintered material, wherein the metal sintered material includes a first portion overlapping the semiconductor chip in a plan view, and includes a second portion surrounding the semiconductor chip in the plan view, and wherein a porosity ratio of the first portion is greater than or equal to 1% and less than 15%, and a porosity ratio of the second portion is greater than or equal to 15% and less than or equal to 50%.

A method of applying a die attach material includes forming a wafer stencil by selectively removing on the back side of a wafer including a plurality of semiconductor die having an active top side a predetermined depth to form a recess having an inner circumference while not removing an outer most circumference of the wafer. The recess is filled with a B-stage adhesive material. The wafer is singulated to form a plurality singulated semiconductor die. The singulated semiconductor die is die attached back side down to a package substrate, and then the B-stage adhesive material is cured. The B-stage adhesive material across its full area generally has a minimum thickness of at least 20 m and a maximum thickness range of 6 m.

A semiconductor device includes a semiconductor substrate and a metal layer disposed on a surface of the semiconductor substrate. The metal layer includes a first metal layer and a second metal layer. The second metal layer covers a surface of the first metal layer and has a higher solder wettability than the first metal layer. The second metal layer is exposed on a main surface of the metal layer. The first metal layer is exposed on a side surface of the metal layer. The metal layer has a protruding portion on the main surface. The protruding portion extends to make one round along an outer peripheral edge of the main surface.

A package structure includes a first RDL, an adhesive layer and a first electronic component. Upper bumps and conductive pads are provided on a first upper surface and a first lower surface of the first RDL, respectively. The adhesive layer is located on the first upper surface of the first RDL and surrounds the upper bumps. The first electronic component is mounted on the adhesive layer and includes conductors which are visible from an active surface of the first electronic component and joined to the upper bumps, the active surface of the first electronic component faces toward the first upper surface of the first RDL. Two adhesive surfaces of the adhesive layer are adhered to the first upper surface of the first RDL and the active surface of the first electronic component, respectively.

In an embodiment, a method includes performing a first plasma deposition to form a buffer layer over a first side of a first integrated circuit device, the first integrated circuit device comprising a first substrate and a first interconnect structure; performing a second plasma deposition to form a first bonding layer over the buffer layer, wherein a plasma power applied during the second plasma deposition is greater than a plasma power applied during the first plasma deposition; planarizing the first bonding layer; forming a second bonding layer over a second substrate; pressing the second bonding layer onto the first bonding layer; and removing the first substrate.

A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

A chip mounting portion included in a semiconductor device has a region including a semiconductor chip in plan view. When an average surface roughness of the region is Ra, 0.8 mRa3.0 m holds.

A chip mounting portion included in a semiconductor device has a region including a semiconductor chip in plan view. When an average surface roughness of the region is Ra, 0.8 mRa3.0 m holds.