An anisotropic conductive film in which conductive particles are disposed in an insulating resin layer has a particle disposition of the conductive particles such that a first orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in an a direction at a predetermined pitch, in a b direction inclined with respect to the a direction at an angle, and a second orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in the a direction at a predetermined pitch, in a c direction obtained by inverting the b direction with respect to the a direction are repeatedly disposed. Regardless of the shape of the terminal arrangements and the materials of electronic components, a good conduction state is ensured while the respective terminals hold conductive particles. Further, the occurrence of a short circuit is prevented.

An anisotropic conductive film in which conductive particles are disposed in an insulating resin layer has a particle disposition of the conductive particles such that a first orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in an a direction at a predetermined pitch, in a b direction inclined with respect to the a direction at an angle, and a second orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in the a direction at a predetermined pitch, in a c direction obtained by inverting the b direction with respect to the a direction are repeatedly disposed. Regardless of the shape of the terminal arrangements and the materials of electronic components, a good conduction state is ensured while the respective terminals hold conductive particles. Further, the occurrence of a short circuit is prevented.

The method for assembling a carrier comprises a step A), in which a plurality of pigments (100), each with an electronic component (1), is provided. Further, each pigment comprises a meltable solder material (2) directly adjoining a mounting side (10) of the component. At least 63% by volume of each pigment is formed by the solder material. The mounting side of each component has a higher wettability with the molten solder material than a top side (12) and a side surface (11) of the component. In a step B), a carrier (200) with pigment landing areas (201) is provided, the pigment landing areas having higher wettability with the molten solder material of the pigments than the regions laterally adjacent to the pigment landing areas and than the side surfaces and the top sides of the components. In a step C), the pigments are applied to the carrier. In a step D), the pigments are heated so that the solder material melts.

A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.

A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.

A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

A method utilized at a sintered metal layer bonding a semiconductor element and a support substrate together suppresses cracks appearing in the sintered metal layer, and damage to the semiconductor element. A semiconductor device includes a support substrate, a semiconductor element, and a sintered metal layer bonding the support substrate and the semiconductor element. The sintered metal layer has a low porosity region disposed inward of an outer edge of the semiconductor element with the sintered metal layer bonded to the semiconductor element. The region is lower in porosity than the remaining sintered metal layer, and is formed as a wall-shaped structural body having an elongated string and extending from an upper surface to a lower surface of the sintered metal layer. The low porosity region is disposed to surround a region immediately below a center of the semiconductor element along the outer edge of the semiconductor element.

A method utilized at a sintered metal layer bonding a semiconductor element and a support substrate together suppresses cracks appearing in the sintered metal layer, and damage to the semiconductor element. A semiconductor device includes a support substrate, a semiconductor element, and a sintered metal layer bonding the support substrate and the semiconductor element. The sintered metal layer has a low porosity region disposed inward of an outer edge of the semiconductor element with the sintered metal layer bonded to the semiconductor element. The region is lower in porosity than the remaining sintered metal layer, and is formed as a wall-shaped structural body having an elongated string and extending from an upper surface to a lower surface of the sintered metal layer. The low porosity region is disposed to surround a region immediately below a center of the semiconductor element along the outer edge of the semiconductor element.

The present disclosure provides a method of creating a bond between a first object and a second object. For example, at least one insert may be provided at a location in a space formed between the first object and the second object. In additional, a filler material may be provided proximal to the location. An inter-diffusion layer may be formed, wherein a first portion of the inter-diffusion layer is formed by diffusion between the filler material and the at least one insert, wherein a second portion of the inter-diffusion layer is formed between the filler material and the first object, wherein a third portion of the inter-diffusion layer is formed between the filler material and the second object, wherein the first portion is coadunate with each of the second portion and third portion.