A semiconductor package including a semiconductor chip, a redistribution layer structure disposed under the semiconductor chip, a bump pad disposed under the redistribution layer structure and having an upper structure of a first width and a lower structure of a second width less than the first width, a metal seed layer disposed along a lower surface of the upper structure and a side surface of the lower structure, an insulating layer surrounding the redistribution layer structure and the bump pad, and a bump structure disposed under the bump pad. A first undercut is disposed at one end of the metal seed layer that contacts the upper structure, and a second undercut is disposed at an other end of the metal seed layer that contacts the lower structure.

A semiconductor package including a semiconductor chip, a redistribution layer structure disposed under the semiconductor chip, a bump pad disposed under the redistribution layer structure and having an upper structure of a first width and a lower structure of a second width less than the first width, a metal seed layer disposed along a lower surface of the upper structure and a side surface of the lower structure, an insulating layer surrounding the redistribution layer structure and the bump pad, and a bump structure disposed under the bump pad. A first undercut is disposed at one end of the metal seed layer that contacts the upper structure, and a second undercut is disposed at an other end of the metal seed layer that contacts the lower structure.

An integrated circuit package is formed by positioning an integrated circuit die on a die pad of a leadframe; connecting a bond wire between the die and a bond pad of the leadframe; encapsulating the bond wire, die, and bond pad with an encapsulant material to form a first mold cap of the integrated circuit package; after the encapsulating, bending one or more leads of the leadframe to form one or more bent leads; and encapsulating the first mold cap and a portion of a bend of the one or more bent leads with the encapsulant material to form a second mold cap.

An integrated circuit package is formed by positioning an integrated circuit die on a die pad of a leadframe; connecting a bond wire between the die and a bond pad of the leadframe; encapsulating the bond wire, die, and bond pad with an encapsulant material to form a first mold cap of the integrated circuit package; after the encapsulating, bending one or more leads of the leadframe to form one or more bent leads; and encapsulating the first mold cap and a portion of a bend of the one or more bent leads with the encapsulant material to form a second mold cap.

A sensor lens assembly having a non-soldering configuration is provided. The sensor lens assembly includes a circuit board, an optical module fixed to the circuit board, a sensor chip and an extending wall both assembled to the circuit board, a plurality of wires electrically coupling the sensor chip and the circuit board, a supporting adhesive layer, and a light-permeable sheet. The extending wall surrounds the sensor chip and has an extending top surface that is substantially flush with a top surface of the sensor chip. The supporting adhesive layer is in a ringed shape and is disposed on the extending top surface of the extending wall and the top surface of the sensor chip. The light-permeable sheet is disposed on the supporting adhesive layer, so that the light-permeable sheet, the supporting adhesive layer, and the top surface of the sensor chip jointly define an enclosed space.

A sensor lens assembly having a non-soldering configuration is provided. The sensor lens assembly includes a circuit board, an optical module fixed to the circuit board, a sensor chip and an extending wall both assembled to the circuit board, a plurality of wires electrically coupling the sensor chip and the circuit board, a supporting adhesive layer, and a light-permeable sheet. The extending wall surrounds the sensor chip and has an extending top surface that is substantially flush with a top surface of the sensor chip. The supporting adhesive layer is in a ringed shape and is disposed on the extending top surface of the extending wall and the top surface of the sensor chip. The light-permeable sheet is disposed on the supporting adhesive layer, so that the light-permeable sheet, the supporting adhesive layer, and the top surface of the sensor chip jointly define an enclosed space.

An electronic device includes a support member and a mount member mounting on the support member. The support member and the mount member are sealed by a resin member. The support member includes a surface having a laser irradiation mark. The mount member includes a surface having a rough portion with an accumulation of material of the support member.

A device includes an interposer including an insulative layer between a lower metal layer and a first upper metal layer and a second upper metal layer, a semiconductor transistor die attached to the first upper metal layer and comprising a first lower main face and a second upper main face, with a drain or collector pad on the first main face and electrically connected to the first upper metal layer, a source or emitter electrode pad and a gate electrode pad on the second main face, a leadframe connected to the interposer and comprising a first lead connected with the first upper metal layer, a second lead connected with the source electrode pad, and a third lead connected with the second upper metal layer, and wherein an electrical connector that is connected between the gate electrode pad and the second upper metal layer is orthogonal to a first electrical connector.

A device includes an interposer including an insulative layer between a lower metal layer and a first upper metal layer and a second upper metal layer, a semiconductor transistor die attached to the first upper metal layer and comprising a first lower main face and a second upper main face, with a drain or collector pad on the first main face and electrically connected to the first upper metal layer, a source or emitter electrode pad and a gate electrode pad on the second main face, a leadframe connected to the interposer and comprising a first lead connected with the first upper metal layer, a second lead connected with the source electrode pad, and a third lead connected with the second upper metal layer, and wherein an electrical connector that is connected between the gate electrode pad and the second upper metal layer is orthogonal to a first electrical connector.

According to one embodiment, a method of manufacturing a semiconductor device includes forming a plurality of stacked bodies on a substrate, each of the stacked bodies includes a plurality of semiconductor chips. The method further includes forming a plurality of first wires on the stacked bodies. The first wires connecting the stacked bodies to each other. The method further includes forming a resin layer on the stacked bodies and the first wires, then thinning he resin layer until the first wires are exposed.