A display panel having a display region and a non-display region, the display panel includes: a substrate having at least one first opening; an electronic component disposed on the substrate; a plurality of pads disposed in the non-display region and including a first pad and a second pad are spaced apart from each other in a first direction with the at least one first opening therebetween; and an adhesive layer disposed between the substrate and the electronic component and overlapping the at least one first opening.

A display panel having a display region and a non-display region, the display panel includes: a substrate having at least one first opening; an electronic component disposed on the substrate; a plurality of pads disposed in the non-display region and including a first pad and a second pad are spaced apart from each other in a first direction with the at least one first opening therebetween; and an adhesive layer disposed between the substrate and the electronic component and overlapping the at least one first opening.

A semiconductor apparatus includes an interconnect substrate having a first major surface, a first semiconductor device having a second major surface and mounted to the interconnect substrate, the second major surface opposing the first major surface, a second semiconductor device having a third major surface and a fourth major surface and mounted to the first semiconductor device, the third major surface opposing the first major surface, the fourth major surface opposing the second major surface, a through hole formed through the interconnect substrate at a position overlapping the second semiconductor device in a plan view taken in a thickness direction of the interconnect substrate, and a heatsink member disposed in contact with part of the third major surface, at least a part of the first major surface, and at least a part of a sidewall surface of the through hole.

In one example, a semiconductor device, includes a substrate having a top side and a conductor on the top side of the substrate, an electronic device on the top side of the substrate connected to the conductor on the top side of the substrate via an internal interconnect, a lid covering a top side of the electronic device, and a thermal material between the top side of the electronic device and the lid, wherein the lid has a through-hole. Other examples and related methods are also disclosed herein.

A package structure and a method for manufacturing the same are provided. The package structure includes a redistribution structure, a first electronic device, at least one second electronic device, a protection material, a heat dissipation structure and a reinforcement structure. The first electronic device is disposed on the redistribution structure. The second electronic device is disposed on the redistribution structure. The protection material is disposed between the first electronic device and the second electronic device. The heat dissipation structure is disposed on the first electronic device and the second electronic device. The reinforcement structure is disposed in an accommodating space between the heat dissipation structure and the protection material.

A semiconductor apparatus includes an interconnect substrate having a first major surface, a first semiconductor device having a second major surface and mounted to the interconnect substrate, the second major surface opposing the first major surface, a second semiconductor device having a third major surface and a fourth major surface and mounted to the first semiconductor device, the third major surface opposing the first major surface, the fourth major surface opposing the second major surface, a through hole formed through the interconnect substrate at a position overlapping the second semiconductor device in a plan view taken in a thickness direction of the interconnect substrate, and a heatsink member disposed in contact with part of the third major surface, at least a part of the first major surface, and at least a part of a sidewall surface of the through hole.

A display device includes a substrate, a first signal line disposed on the substrate, and a first pixel including a first transistor having a gate electrode, a source electrode and a drain electrode, wherein the source electrode is electrically connected to the first signal line. The display device includes a fan-out line electrically connected to the first signal line, wherein the fan-out line partially overlaps the first pixel and is formed in a layer different from layers of the gate electrode, the source electrode and the drain electrode.

An interposer board having heating function and an electronic device using the same are provided. The interposer board includes an insulating body, a plurality of top conductive contacts, a plurality of bottom conductive contacts, a plurality of conductive connection structures and a plurality of micro heaters. The top conductive contacts are disposed on the insulating body. The bottom conductive contacts are disposed on the insulating body. The conductive connection structures are disposed on the insulating body, and the conductive connection structures respectively electrically connected to the top conductive contacts and respectively electrically connected to the bottom conductive contacts. The micro heaters are disposed on or in the insulating body, and the micro heaters are respectively adjacent to the top conductive contacts and the bottom conductive contacts. Each of the top conductive contacts or each of the bottom conductive contacts can be heated by the corresponding micro heater.

In one example, a semiconductor device, comprises a substrate having a top side and a conductor on the top side of the substrate, an electronic device on the top side of the substrate connected to the conductor on the top side of the substrate via an internal interconnect, a lid covering a top side of the electronic device, and a thermal material between the top side of the electronic device and the lid, wherein the lid has a through-hole. Other examples and related methods are also disclosed herein.

Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.