Patent classifications
H01L2224/32501
ANISOTROPIC CONDUCTIVE FILM AND DISPLAY DEVICE INCLUDING SAME
The disclosure relates to a display device and an anisotropic conductive film. An anisotropic conductive film disposed between a display panel and a printed circuit board, the anisotropic conductive film including a base resin, a plurality of first conductive balls dispersed in the base resin, each of the plurality of first conductive balls including a core made of a polymer material and at least one metal layer surrounding the core, and a plurality of second conductive balls dispersed in the base resin, each of the plurality of second conductive balls being made of a meltable material, and the anisotropic conductive film having a first area in which the anisotropic conductive film overlaps the first pad electrode and the first lead electrode in a thickness direction of the display device, and a second area as an area disposed between the first lead electrode and the second lead electrode. Each of the metal layer of the first conductive ball and a surface of the second conductive ball are in contact with both the first pad electrode and the first lead electrode.
Hybrid manufacturing of microeletronic assemblies with first and second integrated circuit structures
Microelectronic assemblies fabricated using hybrid manufacturing, as well as related devices and methods, are disclosed herein. As used herein, “hybrid manufacturing” refers to fabricating a microelectronic assembly by arranging together at least two IC structures fabricated by different manufacturers, using different materials, or different manufacturing techniques. For example, a microelectronic assembly may include a first IC structure that includes first interconnects and a second IC structure that includes second interconnects, where at least some of the first and second interconnects may include a liner and an electrically conductive fill material, and where a material composition of the liner/electrically conductive fill material of the first interconnects may be different from a material composition of the liner/electrically conductive fill material of the second interconnects.
Hybrid manufacturing for integrated circuit devices and assemblies
Microelectronic assemblies fabricated using hybrid manufacturing, as well as related devices and methods, are disclosed herein. As used herein, “hybrid manufacturing” refers to fabricating a microelectronic assembly by arranging together at least two IC structures fabricated by different manufacturers, using different materials, or different manufacturing techniques. For example, a microelectronic assembly may include a first IC structure that includes first interconnects and a second IC structure that includes second interconnects, where at least some of the first and second interconnects may include a liner and an electrically conductive fill material, and where a material composition of the liner/electrically conductive fill material of the first interconnects may be different from a material composition of the liner/electrically conductive fill material of the second interconnects.
Method of manufacturing a semiconductor device including bonding layer and adsorption layer
A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-κ dielectric material.
Display module and method of manufacturing the same
A display module and a method for manufacturing thereof are provided. The display module includes a glass substrate; a thin film transistor (TFT) layer provided on a surface of the glass substrate, the TFT layer including a plurality of TFT electrode pads; a plurality of light emitting diodes (LEDs) provided on the TFT layer, each of the plurality of LEDs including LED electrode pads that are electrically connected to respective TFT electrode pads among the plurality of TFT electrode pads; and a light shielding member provided on the TFT layer and between the plurality of LEDs, wherein a height of the light shielding member with respect to the TFT layer is lower than a height of the plurality of LEDs with respect to the TFT layer.
SEMICONDUCTOR DEVICES INCLUDING BONDING LAYER AND ADSORPTION LAYER
A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-κ dielectric material.
Advanced Device Assembly Structures And Methods
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
Advanced Device Assembly Structures And Methods
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
Semiconductor Package and Method
In an embodiment, a device includes: a first redistribution structure including a first dielectric layer; a die adhered to a first side of the first redistribution structure; an encapsulant laterally encapsulating the die, the encapsulant being bonded to the first dielectric layer with first covalent bonds; a through via extending through the encapsulant; and first conductive connectors electrically connected to a second side of the first redistribution structure, a subset of the first conductive connectors overlapping an interface of the encapsulant and the die.
Solder alloy and junction structure using same
A solder alloy, includes: about 3 wt % to about 15 wt % of Sb; about 0.01 wt % to about 1.5 wt % of Te; and about 0.005 wt % to about 1 wt % of at least one element selected from the group consisting of Zn, Co, and Cr; and a balance of Sn.