Patent classifications
H01L2224/32501
Anisotropic conductive film and production method of the same
An anisotropic conductive film that can be produced in high productivity and can reduce a short circuit occurrence ratio has a first conductive particle layer in which conductive particles are dispersed at a predetermined depth in a film thickness direction, and a second conductive particle layer in which conductive particles are dispersed at a depth different from that in the first conductive particle layer. In the respective conductive particle layers, the closest distances between the adjacent conductive particles are 2 times or more the average particle diameters of the conductive particles.
Method for soldering surface-mount component and surface-mount component
A method for soldering a surface-mount component onto a circuit board. The melting of die-bonding solder material is prevented by using a mounting solder material when soldering a surface-mount component formed using the die-bonding solder material onto a printed circuit board. The surface-mount component, formed using (SnSb)-based solder material having high melting point, the (SnSb)-based solder material containing Cu but not more than a predetermined quantity of Cu constituent and a main ingredient thereof being Sn, is soldered on a board terminal portion of a circuit board using (SnAgCuBi)-based solder material or (SnAgCuBiIn)-based solder material as the mounting solder material and with the solder material being applied on the terminal portion. Since solidus temperature of the die-bonding solder material is 243 degrees C. and liquidus temperature of the mounting solder material is about 215 through 220 degrees C., the melting of die-bonding solder material is prevented even at the heating temperature (240 degrees C. or less) of a reflow furnace.
Methods of forming semiconductor packages
In an embodiment, a device includes: a first redistribution structure including a first dielectric layer; a die adhered to a first side of the first redistribution structure; an encapsulant laterally encapsulating the die, the encapsulant being bonded to the first dielectric layer with first covalent bonds; a through via extending through the encapsulant; and first conductive connectors electrically connected to a second side of the first redistribution structure, a subset of the first conductive connectors overlapping an interface of the encapsulant and the die.
Advanced device assembly structures and methods
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
Advanced device assembly structures and methods
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
Electronic device including soldered surface-mount component
The melting of die-bonding solder material is prevented even when soldering a surface-mount component formed using the die-bonding solder material on a printed circuit board using a mounting solder material. The surface-mount component formed using (SnSb)-based solder material having high melting point as the solder material for die pad, the (SnSb)-based solder material containing Cu not more than a predetermined quantity of Cu constituent and a main ingredient thereof being Sn, is soldered on a board terminal portion of a circuit board using (SnAgCuBi)-based solder material as the mounting solder material with the solder material being applied on the terminal portion. The melting of die-bonding solder material is prevented even at the heating temperature (240 degrees C. or less) of a reflow furnace.
Semiconductor package structure and method for forming the same
A semiconductor package structure has a first electronic component on an insulating layer, a dielectric layer on the insulating layer and surrounding the first electronic component, a second electronic component stacked on the first electronic component, wherein an active surface of the first electronic component faces an active surface of the second electronic component, a molding compound on the first electronic component and surrounding the second electronic component, a third electronic component stacked on the second electronic component and the molding compound.
SOLDER ALLOY AND JUNCTION STRUCTURE USING SAME
A solder alloy, includes: about 3 wt % to about 15 wt % of Sb; about 0.01 wt % to about 1.5 wt % of Te; and about 0.005 wt % to about 1 wt % of at least one element selected from the group consisting of Zn, Co, and Cr; and a balance of Sn.
SOLDER ALLOY AND JUNCTION STRUCTURE USING SAME
A solder alloy, includes: about 3 wt % to about 15 wt % of Sb; about 0.01 wt % to about 1.5 wt % of Te; and about 0.005 wt % to about 1 wt % of at least one element selected from the group consisting of Zn, Co, and Cr; and a balance of Sn.
Monolithic integration of semiconductor materials
A method for forming a semiconductor structure by bonding a donor substrate to a carrier substrate is disclosed herein. The donor substrate may include a plurality of semiconductor layers epitaxially grown on top of one another in, and optionally above, a trench of the donor substrate. The carrier substrate may include a first semiconductor device thereon. The method may include removing at least part of the donor substrate in such a way as to expose a semiconductor layer grown on the bottom of the trench, removing at least part of the exposed semiconductor layer, thereby modifying the plurality of semiconductor layers, and forming a second semiconductor device from the modified plurality of semiconductor layers.