Patent classifications
H01L2224/32505
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
A display device and a method of manufacturing the same are provided. The display device includes a first electrode disposed on a substrate, an adhesive auxiliary layer disposed on the first electrode and including a self-assembled monolayer, a light emitting element disposed on the adhesive auxiliary layer, and a contact electrode disposed between the adhesive auxiliary layer and the light emitting element. The light emitting element includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an intermediate layer disposed between the first semiconductor layer and the second semiconductor layer.
Dielectric Blocking Layer and Method Forming the Same
A method includes forming a first package component, which comprises forming a first dielectric layer having a first top surface, and forming a first conductive feature. The first conductive feature includes a via embedded in the first dielectric layer, and a metal bump having a second top surface higher than the first top surface of the first dielectric layer. The method further includes dispensing a photo-sensitive layer, with the photo-sensitive layer covering the metal bump, and performing a photolithography process to form a recess in the photo-sensitive layer. The metal bump is exposed to the recess, and the photo-sensitive layer has a third top surface higher than the metal bump. A second package component is bonded to the first package component, and a solder region extends into the recess to bond the metal bump to a second conductive feature in the second package component.
METHOD AND MATERIAL FOR ATTACHING A CHIP TO A SUBMOUNT
A die attachment material may include an ultra-violet (UV) curable resin and silver particles to attach a chip to a submount, where the silver particles are positioned within the UV curable resin. A method may include heating the die attachment material to obtain the UV curable resin on sintered silver particles, where at least a portion of the die attachment material is position between a chip and a submount. The method may further include irradiating, with UV light, the UV curable resin to obtain a polymer on the sintered silver particles. The polymer may form a layer on the sintered silver particles.
Multi-layered composite bonding materials and power electronics assemblies incorporating the same
A multilayer composite bonding material for transient liquid phase bonding a semiconductor device to a metal substrate includes thermal stress compensation layers sandwiched between a pair of bonding layers. The thermal stress compensation layers may include a core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness such that a graded stiffness extends across a thickness of the thermal stress compensation layers. The thermal stress compensation layers have a melting point above a sintering temperature and the bonding layers have a melting point below the sintering temperature. The graded stiffness across the thickness of the thermal stress compensation layers compensates for thermal contraction mismatch between the semiconductor device and the metal substrate during cooling from the sintering temperature to ambient temperature.
SEMICONDUCTOR APPARATUS WITH HIGH-STABILITY BONDING LAYER AND PRODUCTION METHOD THEREOF
In an embodiment, a semiconductor apparatus comprises: a semiconductor chip, a substrate, and a bonding layer located between the semiconductor chip and the substrate that bonds the semiconductor chip and the substrate, wherein the bonding layer comprises sintered metal that comprises a plurality of voids, and wherein at least a portion of the plurality of voids are filled with a specific material having fluidity at a temperature higher than a preset temperature and is curable after being heated and melted.
SEMICONDUCTOR APPARATUS WITH HIGH-STABILITY BONDING LAYER AND PRODUCTION METHOD THEREOF
In an embodiment, a semiconductor apparatus comprises: a semiconductor chip, a substrate, and a bonding layer located between the semiconductor chip and the substrate that bonds the semiconductor chip and the substrate, wherein the bonding layer comprises sintered metal that comprises a plurality of voids, and wherein at least a portion of the plurality of voids are filled with a specific material having fluidity at a temperature higher than a preset temperature and is curable after being heated and melted.
Semiconductor device and optical coupling device
According to one embodiment, a semiconductor device includes a first semiconductor element having a first surface, a second semiconductor element having a lower surface bonded to the first surface of the first semiconductor element, a gel-like silicone that covers an upper surface of the second semiconductor element, and a resin portion that covers the gel-like silicone and the first surface of the first semiconductor element.
POWER SEMICONDUCTOR MODULE
The present invention relates to a power semiconductor module including a first heat dissipation substrate, a semiconductor chip, a lead plate, a PCB, and a heat dissipation plate that are packaged within a casing, wherein dualization of a heat dissipation structure is applied to facilitate superior heat dissipation performance compared to a conventional power semiconductor module.
SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL DISSIPATION AND METHOD FOR MAKING THE SAME
A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of 50 W/mK.
BONDING MEMBER, METHOD FOR PRODUCING BONDING MEMBER AND METHOD FOR PRODUCING BONDING STRUCTURE
A bonding member (10) includes surface-processed silver surfaces (11a, 11b).