A semiconductor package includes a base insulating layer; a semiconductor die attached to a portion of the base insulating layer; and a first continuous lead electrically connected to the semiconductor die. The first continuous lead includes a first lateral extension on a first surface of the base insulating layer, a second lateral extension on a second surface of the base insulating layer, and a connecting portion between the first lateral extension and the second lateral extension. The connecting portion penetrates through the base insulating layer.

A semiconductor package includes a base insulating layer; a semiconductor die attached to a portion of the base insulating layer; and a first continuous lead electrically connected to the semiconductor die. The first continuous lead includes a first lateral extension on a first surface of the base insulating layer, a second lateral extension on a second surface of the base insulating layer, and a connecting portion between the first lateral extension and the second lateral extension. The connecting portion penetrates through the base insulating layer.

A power semiconductor module includes a leadframe having a first die pad, a second die pad separated from the first die pad, a first power lead formed as an extension of the first die pad, a second power lead separated from the first and second die pads, and a first connection region formed as an extension of the second power lead alongside the second die pad. A first plurality of power semiconductor dies is attached to the first die pad and electrically coupled in parallel. A second plurality of power semiconductor dies is attached to the second die pad and electrically coupled in parallel. A first electrical connection extends between the first plurality of power semiconductor dies and the second die pad in a first direction. A second electrical connection extends between the second plurality of power semiconductor dies and the first connection region in the first direction.

A power semiconductor module includes a leadframe having a first die pad, a second die pad separated from the first die pad, a first power lead formed as an extension of the first die pad, a second power lead separated from the first and second die pads, and a first connection region formed as an extension of the second power lead alongside the second die pad. A first plurality of power semiconductor dies is attached to the first die pad and electrically coupled in parallel. A second plurality of power semiconductor dies is attached to the second die pad and electrically coupled in parallel. A first electrical connection extends between the first plurality of power semiconductor dies and the second die pad in a first direction. A second electrical connection extends between the second plurality of power semiconductor dies and the first connection region in the first direction.

An electronic package includes an electronic component including terminals, a plurality of surface contacts, at least some of the surface contacts being electrically coupled to the terminals within the electronic package, a mold compound covering the electronic component and partially covering the surface contacts with a bottom surface exposed from the mold compound, and a plurality of wires extending from exposed surfaces of the surface contacts, each of the wires providing a solderable surface for mounting the electronic package at a standoff on an external board.

An electronic package includes an electronic component including terminals, a plurality of surface contacts, at least some of the surface contacts being electrically coupled to the terminals within the electronic package, a mold compound covering the electronic component and partially covering the surface contacts with a bottom surface exposed from the mold compound, and a plurality of wires extending from exposed surfaces of the surface contacts, each of the wires providing a solderable surface for mounting the electronic package at a standoff on an external board.

A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.

A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.

In a described example, an apparatus includes: a first mold compound partially covering a thermal pad that extends through a pre-molded package substrate formed of a first mold compound, a portion of the thermal pad exposed on a die side surface of the pre-molded package substrate, the pre-molded package substrate having a recess on the die side surface, with an exposed portion of the thermal pad and a portion of the first mold compound in a die mounting area in the recess; a semiconductor die mounted to the thermal pad and another semiconductor die mounted to the mold compound in the die mounting area; wire bonds coupling bond pads on the semiconductor dies to traces on the pre-molded package substrate; and a second mold compound over the die side surface of the pre-molded package substrate and covering the wire bonds, the semiconductor dies, the recess, and a portion of the traces.

In a described example, an apparatus includes: a first mold compound partially covering a thermal pad that extends through a pre-molded package substrate formed of a first mold compound, a portion of the thermal pad exposed on a die side surface of the pre-molded package substrate, the pre-molded package substrate having a recess on the die side surface, with an exposed portion of the thermal pad and a portion of the first mold compound in a die mounting area in the recess; a semiconductor die mounted to the thermal pad and another semiconductor die mounted to the mold compound in the die mounting area; wire bonds coupling bond pads on the semiconductor dies to traces on the pre-molded package substrate; and a second mold compound over the die side surface of the pre-molded package substrate and covering the wire bonds, the semiconductor dies, the recess, and a portion of the traces.