Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.

A semiconductor device includes a first die; a second die attached over the first die; a first metal enclosure and a second metal enclosure both directly contacting and vertically extending between the first die and the second die, wherein the first metal enclosure peripherally encircles a set of one or more internal interconnects and the second metal enclosure peripherally encircles the first metal enclosure without directly contacting the first metal enclosure; a first enclosure connector electrically connecting the first metal enclosure to a first voltage level; a second enclosure connector electrically connecting the second metal enclosure to a second voltage level; and wherein the first metal enclosure, the second metal enclosure, the first enclosure connector, and the second enclosure connector are configured to provide an enclosure capacitance.

Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.

A semiconductor manufacturing apparatus comprises a stage connected to a vacuum generator to suction a semiconductor wafer including a plurality of semiconductor chips, a suction control unit connected to a connecting portion of the stage and the vacuum generator to control the connection of the stage and the vacuum generator, a pickup unit connected to a movement control unit simultaneously picking up the plurality of semiconductor chips, and a control unit controlling movement and rotation of the pickup unit and controlling the suction control unit, the control unit is connected to the movement control unit. The pickup unit converts an interval of the plurality of semiconductor chips to a predetermined pitch and holds the pitch. The pickup unit moves the plurality of semiconductor chips from the stage to mounting positions of a supporting substrate and simultaneously adheres the plurality of semiconductor chips at the mounting positions by the control unit.

A soldering system that determines soldering quality of elements relative to a housing at the moment of soldering semiconductor laser elements. A soldering device that performs soldering of a semiconductor laser element to a semiconductor laser module, a robot that conveys the module, a camera, and a control device that controls the robot and camera based on imaging output of the camera. The robot conveys the module and changes the position and posture of the camera. The camera images the module. The control device calculates the position of the semiconductor laser element based on the imaging output, calculates parallelism between the housing of the module and the semiconductor laser element based on the change in light intensity related to the imaging output when changing the relative position between the camera and the subject, and determines the quality of soldering of the semiconductor laser element based on the position and parallelism.

The present invention includes: a position detection unit (55) detecting positions of semiconductor chips and storing each detected position in a position database (56); a position correction unit (57) outputting a corrected bonding position; and a bonding control unit (58) performing bonding of the semiconductor chips based on the corrected bonding position input from the position correction unit (57). The position correction unit (57) calculates position shift amounts between the semiconductor chips of respective stages and an accumulated position shift amount, and when the accumulated position shift amount is greater than or equal to a predetermined threshold value, corrects the position of the semiconductor chip by the accumulated position shift amount and outputs it as the corrected bonding position, and the bonding control unit (58) performs bonding of the semiconductor chip of the next stage at the corrected bonding position input from the position correction unit.

Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.

This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with unwanted pads and the non-interfering area in the donor substrate is maximized. This enables to have transfer the devices to receiver substrate with fewer steps.

Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.

An integrated circuit device includes a first semiconductor substrate having a frontside surface and a backside surface, a front-end-of-line (FEOL) structure on the frontside surface of the first semiconductor substrate, the FEOL structure including a plurality of fin-type active regions, a back-end-of-line (BEOL) structure on the FEOL structure, a second BEOL structure on the backside surface of the first semiconductor substrate, and a second semiconductor substrate spaced apart from the first semiconductor substrate in the vertical direction with the FEOL structure and the first BEOL structure therebetween, wherein a Young's modulus of a first crystal orientation extending parallel to the frontside surface of the first semiconductor substrate is different from a Young's modulus of a second crystal orientation that overlaps the first crystal orientation in the vertical direction and extends parallel to the first crystal orientation in the second semiconductor substrate.