H01L2224/83141

INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME

An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

SELECTIVE TRANSFER OF MICRO DEVICES
20210243894 · 2021-08-05 · ·

What is disclosed is a method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.

Method of forming a dummy die of an integrated circuit having an embedded annular structure

An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

Semiconductor device and method for forming the same

A method for forming a semiconductor device is provided. The method includes providing a substrate. The method includes forming a mask layer over a surface of the substrate. The mask layer has an opening over a portion of the surface. The method includes depositing a conductive layer over the surface and the mask layer. The method includes removing the mask layer and the conductive layer over the mask layer. The conductive layer remaining after the removal of the mask layer and the conductive layer over the mask layer forms a conductive pad. The method includes bonding a device to the conductive pad through a solder layer. The conductive pad is embedded in the solder layer.

Semiconductor package including cap layer and dam structure and method of manufacturing the same

A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE
20210202435 · 2021-07-01 · ·

A first alignment resin (4) is formed in an annular shape on an electrode (3) of an insulating substrate (1). First plate solder (5) having a thickness thinner than that of the first alignment resin (4) is arranged on the electrode (3) on an inner side of the annular shape of the first alignment resin (4). A semiconductor chip (6) is arranged on the first plate solder (5). The first plate solder (5) is made to melt to bond a lower surface of the semiconductor chip (6) to the electrode (3).

Laser bonding method

A laser bonding method includes forming a bonding part including an adhesive layer and a conductive particle disposed within the adhesive layer on a substrate; aligning a bonding target by disposing the bonding target on a surface of the bonding part opposite the substrate; disposing a pressing part on a surface of the bonding target that is opposite to the bonding part and pressing the bonding target onto the bonding part through the pressing part; heating the bonding target by irradiating at least the pressing part with a laser and conducting heat from the pressing part to the bonding target and from the bonding target to the bonding part; and bonding together the bonding part and the bonding target by the heat conducted from the bonding target to the bonding part so that the conductive particle electrically connects the substrate and the bonding target. The pressing part may be removed.

Automatic registration between circuit dies and interconnects

Processes for automatic registration between a solid circuit die and electrically conductive interconnects, and articles or devices made by the same are provided. The solid circuit die is disposed on a substrate with contact pads aligned with channels on the substrate. Electrically conductive traces are formed by flowing a conductive liquid in the channels toward the contact pads to obtain the automatic registration.

Bump structures for high density flip chip interconnection

A method of forming bump structures for interconnecting components includes applying an insulating layer over a device substrate, coating the insulating layer with a dielectric material layer, forming a pattern with photolithography on the dielectric material layer, etching the dielectric material layer to transfer the pattern to the insulating layer, etching the insulating layer to form pockets in the insulating layer following the pattern, applying photolithography to and etching the dielectric material layer to reduce overhang of the dielectric material layer relative to the insulating layer, removing material from top and side walls of the pockets in the insulating layer, and depositing electrically conductive bump material in the pattern so a respective bump is formed in each pocket.

SINTER SHEET, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
20200402944 · 2020-12-24 ·

A sintered member is provided between a semiconductor chip and a terminal. The sintered member is made of a sinter sheet by heating and pressing the same. The semiconductor chip is connected to the terminal via the sintered member. Convex portions are formed at a front-side surface of the semiconductor chip. Concave portions, each of which has such a shape corresponding to that of each convex portion of the semiconductor chip, are formed at a surface of the sintered member facing to the semiconductor chip.