A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

A semiconductor package includes a first semiconductor die, a second semiconductor die and a plurality of bumps. The first semiconductor die has a front side and a backside opposite to each other. The second semiconductor die is disposed at the backside of the first semiconductor die and electrically connected to first semiconductor die. The plurality of bumps is disposed at the front side of the first semiconductor die and physically connects first die pads of the first semiconductor die. A total width of the first semiconductor die may be less than a total width of the second semiconductor die.

The present disclosure provides an antenna packaging structure radiating electromagnetic waves in a horizontal direction parallel to the device plane and a method making the same. The method includes: providing a support substrate, and forming a separation layer; forming a rewiring layer on the separation layer; forming an antenna array layer on the rewiring layer, the antenna array layer is electrically connected to the metal wire layer; the antenna array layer includes a plurality of antennas which radiates e-m waves in a horizontal direction; each antennas comprises first metal sheets extending along a first direction and second metal sheets extending along a second direction, the first metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval, second metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval; forming a molding material layer, which molds the antenna array layer.

The present disclosure provides an antenna packaging structure radiating electromagnetic waves in a horizontal direction parallel to the device plane and a method making the same. The method includes: providing a support substrate, and forming a separation layer; forming a rewiring layer on the separation layer; forming an antenna array layer on the rewiring layer, the antenna array layer is electrically connected to the metal wire layer; the antenna array layer includes a plurality of antennas which radiates e-m waves in a horizontal direction; each antennas comprises first metal sheets extending along a first direction and second metal sheets extending along a second direction, the first metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval, second metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval; forming a molding material layer, which molds the antenna array layer.

Semiconductor chips may include a substrate; a protective layer on a first surface of the substrate, through electrodes extending through the substrate and the protective layer, and a Peltier structure including first through structures including first conductivity type impurities, and second through structures including second conductivity type impurities, which may extend through the substrate and the protective layer; pads on the protective layer and connected to the through electrodes, respectively, first connection wires connecting respective first ends of the first through structures to respective first ends of the second through structures, and second connection wires connecting respective second ends of the first through structures to respective second ends of one of the second through structures. The first through structures and the second through structures may be alternately connected to each other in series by the first connection wires and the second connection wires.

Semiconductor chips may include a substrate; a protective layer on a first surface of the substrate, through electrodes extending through the substrate and the protective layer, and a Peltier structure including first through structures including first conductivity type impurities, and second through structures including second conductivity type impurities, which may extend through the substrate and the protective layer; pads on the protective layer and connected to the through electrodes, respectively, first connection wires connecting respective first ends of the first through structures to respective first ends of the second through structures, and second connection wires connecting respective second ends of the first through structures to respective second ends of one of the second through structures. The first through structures and the second through structures may be alternately connected to each other in series by the first connection wires and the second connection wires.

An integrated circuit assembly may be formed comprising an electronic substrate, a first and second integrated circuit device each having a first surface, a second surface, at least one side extending between the first and second surface, and an edge defined at an intersection of the second surface and the at least one side of each respective integrated circuit device, wherein the first surface of each integrated circuit device is electrically attached to the electronic substrate, an underfill material between the first surface of each integrated circuit device and the electronic substrate, and between the sides of the first and second integrated circuit devices, and at least one barrier structure adjacent at least one of the edge of first integrated circuit device and the edge of the second integrated circuit device, wherein the underfill material abuts the at least one barrier structure.

An integrated circuit assembly may be formed comprising an electronic substrate, a first and second integrated circuit device each having a first surface, a second surface, at least one side extending between the first and second surface, and an edge defined at an intersection of the second surface and the at least one side of each respective integrated circuit device, wherein the first surface of each integrated circuit device is electrically attached to the electronic substrate, an underfill material between the first surface of each integrated circuit device and the electronic substrate, and between the sides of the first and second integrated circuit devices, and at least one barrier structure adjacent at least one of the edge of first integrated circuit device and the edge of the second integrated circuit device, wherein the underfill material abuts the at least one barrier structure.

Light emitting devices and methods for their manufacture are provided. According to one aspect, a light emitting device is provided that comprises a substrate having a recess, and an interlayer dielectric layer located on the substrate. The interlayer dielectric layer may have a first hole and a second hole, the first hole opening over the recess of the substrate. The light emitting device may further include first and second micro LEDs, the first micro LED having a thickness greater than the second micro LED. The first micro LED and the second micro LED may be placed in the first hole and the second hole, respectively.

Light emitting devices and methods for their manufacture are provided. According to one aspect, a light emitting device is provided that comprises a substrate having a recess, and an interlayer dielectric layer located on the substrate. The interlayer dielectric layer may have a first hole and a second hole, the first hole opening over the recess of the substrate. The light emitting device may further include first and second micro LEDs, the first micro LED having a thickness greater than the second micro LED. The first micro LED and the second micro LED may be placed in the first hole and the second hole, respectively.