A method for performing polar coding is disclosed in the application. A data block is segmented into a plurality of first blocks. Difference in bit length between any two first blocks is not more than one bit. For each first block, one or more consecutive padding bits is added to obtain a second block of a bit length K if the bit length of the first block is less than K, so as to obtain a plurality of second blocks corresponding to the first blocks. N-K consecutive bits are added to each of the second blocks to obtain a plurality of third blocks. Polar encoding is performed on the third blocks.

Disclosed are: a communication method for merging, with IoT technology, a 5G communication system for supporting a data transmission rate higher than that of a 4G system; and a system thereof. The present disclosure can be applied to intelligent services (for example, smart home, smart building, smart city, smart car or connected car, healthcare, digital education, retail, security and safety related services, and the like) on the basis of a 5G communication technology and an IoT-related technology. A method by which a transmitter in a communication system transmits signals, according to one embodiment of the present specification, comprises the steps of: determining depth information for generating a mother code size and a parity bit; applying a polar code sequence corresponding to an information bit; generating, on the basis of the mother code size and the depth information, a codeword including a parity bit associated with at least two bits among a plurality of bits to which the polar code sequence is applied; and transmitting the generated codeword.

Embodiments of the present invention disclose an information processing method and apparatus, and a device. The method includes: if R.sub.real is greater than or equal to R.sub.min, determining, based on a maximum code block length K.sub.max of an LDPC (low-density parity-check code) code, a quantity C of code blocks into which a transport block is to be segmented, where R.sub.real is a largest one among an encoding code rate of the transport block, a code rate limit of the transport block, and a minimum code rate of the LDPC code, and R.sub.min is a minimum code rate corresponding to the maximum code block length of the LDPC code, or a larger one between a minimum code rate corresponding to the maximum code block length of the LDPC code and a code rate limit of the maximum code block length of the LDPC code.

A communication method is provided, including: obtaining a to-be-segmented first bit sequence, where a quantity of bits in the first bit sequence is B, and a quantity of bits that can be carried by a physical resource corresponding to the first bit sequence is N.sub.1; determining, based on N.sub.1 and a parameter L, a quantity C of bit sequences obtained by segmenting the first bit sequence, where a value of L is equal to (B+B.sub.1)/R.sub.min,K.sub.max, R.sub.min,K.sub.max is a minimum bit rate corresponding to an available maximum code block length K.sub.max, and B.sub.1 is an integer greater than or equal to 0; and segmenting the first bit sequence into C segmented bit sequences. Based on the method, a proper code block segmentation scheme can be provided.

Aspects of the disclosure provide polar code rate matching methods. A first method can include determining whether to puncture or shorten a mother polar code according to a mother code rate and/or a rate matched code rate, and selecting K positions in the sequence of N input bits for input of K information bits to a polar encoder according to an offline prepared index list ordered according to the reliabilities of respective synthesized channels. Frozen input bits caused by puncturing or shortening are skipped during the selection. A second method includes generating a mother polar code, rearranging code bits of the mother polar code to form a rearranged sequence that can be stored in a circular buffer, and performing, in a unified way, one of puncturing, shortening, or repetition on the rearranged sequence to obtain a rate matched code.

A computer-implemented method for using invertible, shortened codewords is described. The method includes receiving a request to store user data bits in a set of memory devices; expanding the user data bits and an inversion bit to bit locations of a codeword template, wherein the expanding forms expanded inversion and user data bits that collectively include additional bits to represent the user data bits and the inversion bit; generating parity bits for the expanded inversion and user data bits to form a shortened codeword, wherein the shortened codeword comprises the expanded inversion and user data bits, and the parity bits; compressing the shortened codeword to form a compressed shortened codeword; and storing the compressed shortened codeword in the set of memory devices.

Devices and methods that generate code on chip-kill parity in which the code is generated and shortened using variable node degree information for improved decoding of data. In one aspect, memory controller comprises an encoder configured to construct a first code of D data bits and P parity bits, determine the number of distinct variable degree nodes L and the number of data bits of each of the variable degree nodes in the first code, and construct a second code that is shorter than the first code based on the determined number of variable degree nodes and the number of data bits of each of the variable degree nodes in the first code.

An apparatus (100) for providing an joint error correction code (140) for a combined data frame (254) comprising first data (112) of a first data channel and second data (122) of a second data channel comprises a first error code generator (110) configured to provide, based on a linear code, information on a first error correction code (114a, 114b) using the first data (112). The apparatus further comprises a second error code generator (120) configured to provide, based on the linear code, information on a second error correction code (124) using the second data (122). The apparatus is configured to provide the joint error correction code (140) using the information on the first error correction code (114a, 114b) and the information on the second error correction code (124).

An apparatus (100) for providing an joint error correction code (140) for a combined data frame (254) comprising first data (112) of a first data channel and second data (122) of a second data channel comprises a first error code generator (110) configured to provide, based on a linear code, information on a first error correction code (114a, 114b) using the first data (112). The apparatus further comprises a second error code generator (120) configured to provide, based on the linear code, information on a second error correction code (124) using the second data (122). The apparatus is configured to provide the joint error correction code (140) using the information on the first error correction code (114a, 114b) and the information on the second error correction code (124).

Methods and apparatus for the decoding of forward error correction codes. One method includes decoding a number of component codes including code symbols, for which at least one code symbol is involved in multiple component codes, and analyzing the decoding of each of the component codes to generate an outcome. Analyzing the decoding includes estimating at least one possible error location, storing information related to the at least one possible error location; storing state information, and updating the state information.