Producing a semiconductor or piezoelectric on-insulator type substrate for RF applications which is provided with a porous layer under the BOX layer and under a layer of polycrystalline semiconductor material.

An epitaxial wafer that includes a silicon wafer and an epitaxial layer on the silicon wafer. The silicon wafer contains hydrogen that has a concentration profile including a first peak and a second peak. A hydrogen peak concentration of the first peak and a hydrogen peak concentration of the second peak are each not less than 1×10.sup.17 atoms/cm.sup.3.

Provided is a semiconductor device, including a semiconductor substrate having an upper surface and a lower surface and including a bulk donor, wherein a hydrogen chemical concentration distribution of the semiconductor substrate in a depth direction is flat, monotonically increasing, or monotonically decreasing from the lower surface to the upper surface except for a portion where a local hydrogen concentration peak is provided; and a donor concentration of the semiconductor substrate is higher than a bulk donor concentration over an entire region from the upper surface to the lower surface. Hydrogen ions may be irradiated from the upper surface or the lower surface of the semiconductor substrate so as to penetrate the semiconductor substrate in the depth direction.

A manufacturing method of a thin film transistor is provided, which has advantages that there are sufficient hydrogen ions in an interlayer dielectric layer. In an annealing treatment, an amount of the hydrogen ions diffused into an active layer is sufficient, and the hydrogen ions enter a channel of the thin film transistor to fill non-bonded or unsaturated bonds of polysilicon atoms, thereby filling defects in the channel, repairing the defects of the active layer, reducing the number of unsteady states, and improving mobility and threshold voltage uniformity.

In one aspect, a substrate includes a base substrate, a dielectric layer directly on the base substrate, a trap-rich layer directly on the dielectric layer, and a crystalline semiconductor layer directly on the trap-rich layer. The dielectric layer may be a stack of multiple dielectric sublayers formed of the same dielectric material or formed of two or more different dielectric materials. The substrate can be suitable to epitaxially grow on the surface of the crystalline semiconductor layer one or more layers of a compound semiconductor. One application is the growth of a stack of layers of III-V material with one or more upper layers of the stack being suitable to process in and/or on the layers a number of semiconductor devices such as transistors or diodes. The position of the trap-rich layer, between the dielectric layer and the crystalline semiconductor layer, can enable the neutralization of a parasitic surface conductive (PSC) layer at the interface between the crystalline layer and the compound layer or layers, and of an additional PSC layer caused by a direct contact between the crystalline layer and the dielectric layer. The disclosed technology is equally related to methods of producing the substrate of the disclosed technology.

First and second n-type field stop layers in an n.sup.− drift region come into contact with a p.sup.+ collector layer. The first n-type field stop layer has an impurity concentration reduced toward an n.sup.+ emitter region at a steep gradient. The second n-type field stop layer has an impurity concentration distribution in which impurity concentration is reduced toward the n.sup.+ emitter region at a gentler gradient than that in the first n-type field stop layer and the impurity concentration of a peak position is less than that in the impurity concentration distribution of the first n-type field stop layer. The impurity concentration distributions of the first and second n-type field stop layers have the same peak position. The first and second n-type field stop layers are formed using annealing and first and second proton irradiation processes which have the same projected range and different acceleration energy levels.

Provided is a semiconductor epitaxial wafer in which the concentration of hydrogen in a modifying layer can be maintained at a high level and the crystallinity of an epitaxial layer is excellent. A semiconductor epitaxial wafer has a semiconductor wafer, a modifying layer formed in a surface portion of the semiconductor wafer, which modifying layer has hydrogen contained as a solid solution in the semiconductor wafer, and an epitaxial layer formed on the modifying layer. The concentration profile of hydrogen in the modifying layer in the thickness direction from a surface of the epitaxial layer is a double peak concentration profile including a first peak shallower in the depth direction and a second peak deeper in the depth direction.

There is provided a semiconductor device comprising: a semiconductor substrate; an emitter region of a first conductivity type provided inside the semiconductor substrate; a base region of a second conductivity type provided below the emitter region inside the semiconductor substrate; an accumulation region of the first conductivity type provided below the base region inside the semiconductor substrate, and containing hydrogen as an impurity; and a trench portion provided to pass through the emitter region, the base region and the accumulation region from an upper surface of the semiconductor substrate.

A production method for a semi-conductor-on-insulator type multilayer stack includes ion implantation in a buried portion of a superficial layer of a support substrate, so as to form a layer enriched with at least one gas, intended to form a porous semi-conductive material layer, the thermal oxidation of a superficial portion of the superficial layer to form an oxide layer extending from the surface of the support substrate, the oxidation and the implantation of ions being arranged such that the oxide layer and the enriched layer are juxtaposed, and the assembly of the support substrate and of a donor substrate.

The invention relates to a method for forming a porous portion in a substrate, an implantation of ions in at least one region of a layer, for example based on a semiconductor material, so as to form a portion enriched with at least one gas in the implanted region, and then a laser annealing of the nanosecond type so as to form a porous portion. The use of the ion implantation makes it possible to dissociate the deposition of the layer based on semiconductor material from the incorporation of gas. A great variety of porous structures can be obtained by the method. These porous structures can be adapted for numerous applications according to the properties sought.