A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.

Provided is a semiconductor device manufacturing method including a process of annealing a semiconductor wafer in a state in which a supported portion on a lower surface of the semiconductor wafer is supported by using a supporting portion, wherein the supported portion includes one or a plurality of supporting portions and the supporting portion includes one or a plurality of supporting portions, the method comprising: forming impurity regions including a first impurity in a region which is overlapped with the supported portion in a top view and which is apart from an edge of the semiconductor wafer; annealing the semiconductor wafer in a state in which the lower surface of the semiconductor wafer is supported by the supporting portion; and removing the impurity regions by removing a region including the lower surface of the semiconductor wafer.

A method of producing silicon single crystal ingot by pulling the silicon single crystal ingot made of an N-region by the CZ method, including: performing an EOSF inspection including a heat treatment to manifest oxide precipitates and selective etching on sample wafer from the silicon single crystal ingot composed of the N-region to measure a density of EOSF; performing a shallow-pit inspection to investigate a pattern of occurrence of a shallow pit; adjusting the pulling conditions according to result of identification of a defect region of the sample wafer by the EOSF and shallow-pit inspections to pull a next silicon single crystal ingot composed of the N-region, wherein in the identification of the defect region, for an N-region, what portion of an Nv-region or Ni-region the defect region corresponds to is also identified.

After determining the size of oxygen precipitates and the residual oxygen concentration in a silicon wafer after heat treatment performed in a device fabrication process; the critical shear stress τ.sub.cri at which slip dislocations are formed in the silicon wafer in the device fabrication process is determined based on the obtained size of the oxygen precipitates and residual oxygen concentration; and the obtained critical shear stress τ.sub.cri and the thermal stress τ applied to the silicon wafer in the heat treatment of the device fabrication process are compared, thereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress τ is equal to or more than the critical shear stress τ.sub.cri, or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress τ is less than the critical shear stress τ.sub.cri.

A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.

A method for heat-treating a silicon single crystal wafer by an RTA treatment, including: putting a silicon single crystal wafer having an Nv region for the entire plane of the silicon single crystal wafer or an Nv region containing an OSF region for the silicon single crystal wafer entire plane into an RTA furnace, performing pre-heating at temperature lower than temperature at which silicon reacts with NH3 while supplying gas that contains NH3 into the RTA furnace, subsequently stopping the supply of the gas containing NH3 and starting supply of Ar gas to start an RTA treatment under Ar gas atmosphere in which the NH3 gas remains. This provide a method for heat-treating a silicon single crystal wafer that give gettering capability without degrading TDDB properties even to a silicon single crystal wafer in which the entire plane is an Nv region or an Nv region containing an OSF region.

The present invention relates to a thermal processing method for wafer. A wafer is placed in an environment filled with a gas mixture comprising oxygen gas and deuterium gas, and a rapid thermal processing process is performed on a surface of the wafer. As a result, a denuded zone is formed on the surface of the wafer, deuterium atoms, which may be released to improve characteristics at an interface of semiconductor devices in a later fabrication process, are held in the wafer, and bulk micro-defects are formed far from the semiconductor devices.

The present invention relates to a thermal processing method for wafer. A wafer is placed in an environment filled with a non-oxygenated gas mixture comprising deuterium gas and at least one kind of low active gas, and a rapid heating processing process is performed on a surface of the wafer to heat the wafer to a predetermined high temperature. Then, the wafer is placed in an environment filled with an oxygenated gas mixture, and a rapid cooling processing process is performed on a surface of the wafer. As a result, a denuded zone is formed on the surface of the wafer, deuterium atoms, which may be released to improve characteristics at an interface of semiconductor devices in a later fabrication process, are held in the wafer, and bulk micro-defects are formed far from the semiconductor devices.

A method of manufacturing an imaging apparatus includes: preparing a substrate comprising a wafer and a silicon layer arranged on the wafer, the wafer including a first semiconductor region made of single crystal silicon with an oxygen concentration not less than 2×10.sup.16 atoms/cm.sup.3 and not greater than 4×10.sup.17 atoms/cm.sup.3, the silicon layer including a second semiconductor region made of single crystal silicon with an oxygen concentration lower than the oxygen concentration in the first semiconductor region; annealing the substrate in an atmosphere containing oxygen and setting the oxygen concentration in the second semiconductor region within the range not less than 2×10.sup.16 atoms/cm.sup.3 and not greater than 4×10.sup.17 atoms/cm.sup.3; and forming a photoelectric conversion element in the second semiconductor region after the annealing.

A silicon wafer is provided which is a Czochralski wafer formed of silicon, and a method for producing the silicon wafer are provided. The wafer includes a bulk layer having an oxygen concentration of 0.5×10.sup.18/cm.sup.3 or more; and a surface layer extending from the surface of the wafer to 300 nm in depth, and having an oxygen concentration of 2×10.sup.18/cm.sup.3 or more.