This application provides a process for making a circuit of a bipolar junction transistor (BJT). The switchable short in one implementation of the invention is formed in a semiconductor wafer. A collector region is formed in the semiconductor wafer and inside of the collector region, a first base region is formed. An emitter region is formed inside the base region to form the BJT. A drain region is also formed inside the base region adjacent to the emitter region. A gate is formed over a portion of the base region adjacent to the drain region and the emitter region. The gate is connected to the collection region.

An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n− epi layer, a p-well, trenched insulated gate regions formed in the p-well, and n+ regions between the gate regions, so that vertical NPN and PNP transistors are formed. The device may be formed of a matrix of cells or may be interdigitated. To turn the device on, a positive voltage is applied to the gate, referenced to the cathode. The cells further contain a vertical p-channel MOSFET, for rapidly turning the device off. The p-channel MOSFET may be made a depletion mode device by implanting boron ions at an angle into the trenches to create a p-channel. This allows the IGTO device to be turned off with a zero gate voltage while in a latch-up condition, when the device is acting like a thyristor.

An electronic device can include doped regions and a trench disposed between the doped regions, wherein the trench can include a conductive member. In an embodiment, a parasitic transistor can include doped regions as drain/source regions and the conductive member as a gate electrode. A semiconductor material can lie along a bottom or sidewall of the trench and be a channel region of the parasitic transistor. The voltage on the gate electrode or the dopant concentration can be selected so that the channel region does not reach inversion during the normal operation of the electronic device.

The invention solves the problem of depressed SOA of a bipolar junction transistor (BJT) when operated in an open base configuration by integrating in the same semiconductor chip a switchable short between the base and the emitter of the BJT. The switchable short switches between a high resistive value when the collector voltage of the BJT is lower than the base voltage. and a lower resistive value when the collector voltage is higher than the voltage base to effectively lower the BJT current gain (h.sub.FE). The switchable short in one implementation of the invention is in the form of a MOSFET with its gate connected to the BJT collector. The invention further teaches disposing in the integrated circuit chip a junction diode with a breakdown voltage lower than the BVCBO of the BJT. The addition of the junction diode provides a measure of maintaining the effectiveness of the MOSFET as switchable short at a reduced size.

To provide a semiconductor device that has barrier metal and has a small variation in a threshold voltage. A semiconductor device is provided, including a semiconductor substrate, an interlayer dielectric film arranged on an upper surface of the semiconductor substrate, a titanium layer provided on the interlayer dielectric film, and a titanium nitride layer provided on the titanium layer, where the interlayer dielectric film is provided with an opening that exposes a part of the upper surface of the semiconductor substrate, the titanium layer and the titanium nitride layer are also provided within the opening, and the titanium layer arranged in contact with the semiconductor substrate and on a bottom portion of the opening is entirely titanium-silicided.

A semiconductor device includes first and second electrodes, first regions of a first conductivity type, second regions of a second conductivity type, a third region of the first conductivity type, fourth regions of the second conductivity type, fifth regions of the second conductivity type. The first and second regions are on the first electrode. The third region is on the first and second regions. The fourth and fifth regions are on the third region. The second electrode is on the fourth and fifth regions. Every second region is directly below a fifth region.

An electronic device can include doped regions and a trench disposed between the doped regions, wherein the trench can include a conductive member. In an embodiment, a parasitic transistor can include doped regions as drain/source regions and the conductive member as a gate electrode. A semiconductor material can lie along a bottom or sidewall of the trench and be a channel region of the parasitic transistor. The voltage on the gate electrode or the dopant concentration can be selected so that the channel region does not reach inversion during the normal operation of the electronic device.

A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile includes multiple doped regions with peak doping levels where a first doped region adjacent to a first side of the field stop zone has a first peak doping level that is not higher than a last peak doping level of a last doped region adjacent to the base region. The epitaxial layer field stop zone of the present invention enables complex field stop zone doping profiles to be used to obtain the desired soft-switching characteristics in the semiconductor device.

Provided is a semiconductor apparatus in which the buried region includes an end portion buried region continuously disposed from a region below the contact opening up to a region below the interlayer dielectric film while passing below an end portion of the contact opening in a cross section perpendicular to the upper surface of the semiconductor substrate, and the end portion buried region disposed below the interlayer dielectric film is shorter than the end portion buried region disposed below the contact opening in a first direction in parallel with the upper surface of the semiconductor substrate.

A semiconductor device includes a semiconductor substrate, and the semiconductor substrate is divided into an IGBT region, a diode region, and a MOSFET region. A drift layer of n.sup.−-type is provided in the semiconductor substrate. The drift layer is shared among the IGBT region, the diode region, and the MOSFET region. In the semiconductor substrate, the diode region is always disposed between the IGBT region and the MOSFET region to cause the IGBT region and the MOSFET region to be separated from each other without being adjacent to each other.