Provided is a method of manufacturing a semiconductor device, the method including: forming an insulating layer on a substrate; forming a trench, which extends in a first direction parallel with the plane of the substrate, to a preset depth in the insulating layer in a second direction perpendicular to the plane of the substrate; forming a plurality of amorphous silicon strips, which extend from the inside of the trench in the second direction intersecting with the first direction, in parallel in a first direction; forming a spacer on a side of the amorphous silicon strip by using an insulating material layer; and crystallizing the amorphous silicon strip by heat treatment, wherein crystal nucleation sites are formed in the amorphous silicon layer in the trench, and a polycrystalline silicon layer is formed by lateral grain growth in a longitudinal direction of the amorphous silicon strip from the crystal nucleation site.

A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

A method of manufacturing a low temperature polysilicon thin film, including the steps of: forming a buffer layer on a substrate; forming a silicon layer on the buffer layer; roughening a surface of the silicon layer to form an uneven surface as a recrystallization growth space; and annealing the silicon layer to form a polysilicon layer, and a partial silicon material of the polysilicon layer is formed on the recrystallization growth space.

A method and structure for providing a GAA device. In some embodiments, a substrate including an insulating layer disposed thereon is provided. By way of example, a first metal portion is formed within the insulating layer. In various embodiments, a first lateral surface of the first metal portion is exposed. After exposure of the first lateral surface of the first metal portion, a first graphene layer is formed on the exposed first lateral surface. In some embodiments, the first graphene layer defines a first vertical plane parallel to the exposed first lateral surface. Thereafter, in some embodiments, a first nanobar is formed on the first graphene layer, where the first nanobar extends in a first direction normal to the first vertical plane defined by the first graphene layer.

A laser apparatus includes a laser generator configured to generate a first laser beam proceeding along a first direction, and an inversion module configured to convert the first laser beam to a second laser beam proceeding along the first direction, the inversion module including a splitter configured to form a reflected laser beam by partially reflecting the first laser beam, and a transmitted laser beam by partially transmitting the first laser beam, and a prism configured to reflect the reflected laser beam.

There is provided a display device including: a light emitting element; and a drive transistor (DRTr) that includes a coupling section (W1) and a plurality of channel sections (CH) coupled in series through the coupling section (W1), wherein the drive transistor (DRTr) is configured to supply a drive current to the light emitting element.

A display device in which ambient light reflections, for example, from IPS or FFS type displays are reduced by a circular polariser (e.g., linear polariser combined with external quarter waveplate) to make the light circular polarized, as it traverses the multiple reflective layers between the polariser and LC layer, and then an internal quarter waveplate converts the light back to linear polarisation before it enters the LC, so the display can operate as normal, while the circular polariser absorbs unwanted reflections of ambient light from within the display.

An industrially useful p-type oxide semiconductor with an enhanced semiconductor characteristic and a method of forming the p-type oxide semiconductor is provided. By using a metal oxide (for example, iridium oxide) gas as a raw material and conducting a crystal growth on a base with a corundum structure (for example, a sapphire substrate) until a film thickness to be equal to or more than 50 nm, a p-type oxide semiconductor film with a corundum structure includes a film thickness of equal to or more than 50 nm and a surface roughness of equal to or less than 10 nm is obtained.

A manufacturing method of a thin film transistor is provided, which includes steps of: providing a flexible substrate with an active layer formed thereon; providing a dielectric layer disposed on the active layer, wherein the dielectric layer has openings; providing a heavily doped silicon layer in the openings, wherein the heavily doped silicon layer is connected to the active layer, extends upward along a sidewall of the openings, and covers an upper surface of the dielectric layer, and the heavily doped silicon layer configured as at least one source/drain; and providing a metal layer in the openings and on the at least one source/drain, wherein the metal layer is connected to the at least one source/drain. The active layer and the source/drain are formed as a same semiconductor material, so that contact resistance can be effectively lowered, thereby improving energy consumption.

A thin film transistor includes an active layer including a first portion having a first thickness and a second portion having a second thickness greater than the first thickness, a capping layer filling a thickness difference between the first portion and the second portion and arranged on the first portion, a gate insulating layer arranged on the capping layer, a gate electrode on the active layer, wherein the gate insulating layer and the capping layer are disposed between the gate electrode and the active layer, and a source electrode and a drain electrode connected to the active layer.