A semiconductor device according to the present invention includes: a semiconductor layer including a first conductivity type semiconductor region and a second conductivity type semiconductor region joined to the first conductivity type semiconductor region; and a surface electrode connected to the second conductivity type region on one surface of the semiconductor layer, including a first Al-based electrode, a second Al-based electrode, a barrier metal interposed between the first Al-based electrode and the second Al-based electrode, and a plated layer on the second Al-based electrode.

Provided is a method for manufacturing a semiconductor device that improves the reliability of the semiconductor device. An opening is formed in an insulating film formed over a semiconductor substrate. At that time, a mask layer for formation of the opening is formed over the insulating film. The insulating film is dry etched and then wet etched. The dry etching step is finished before the semiconductor substrate is exposed at the bottom of the opening, and the wet etching step is finished after the semiconductor substrate is exposed at the bottom of the opening.

Methods and systems for operating a double-base bidirectional power bipolar transistor. Two timing phases are used to transition into turn-off: one where each base is shorted to its nearest emitter/collector region, and a second one where negative drive is applied to the emitter-side base to reduce the minority carrier population in the bulk substrate. A diode prevents reverse turn-on while negative base drive is being applied.

A semiconductor device and its manufacturing method are presented. The semiconductor device includes a collection region, a base region adjacent to the collection region, an emission region adjacent to the base region, and a doped semiconductor layer on the emission region. The width of the doped semiconductor layer is larger than the width of the emission region, a conductive type (e.g., P-type or N-type) of the doped semiconductor layer is the same as a conductive type of the emission region. In this inventive concept, the width of the doped semiconductor layer on the emission region is larger than the width of the emission region, that equivalently increases the width of the emission region, which in turn increases the DC amplification factor () and therefore improves the overall performance of the semiconductor device.

The present application teaches, among other innovations, power semiconductor devices in which breakdown initiation regions, on BOTH sides of a die, are located inside the emitter/collector regions, but laterally spaced away from insulated trenches which surround the emitter/collector regions. Preferably this is part of a symmetrically-bidirectional power device of the B-TRAN type. In one advantageous group of embodiments (but not all), the breakdown initiation regions are defined by dopant introduction through the bottom of trench portions which lie within the emitter/collector region. In one group of embodiments (but not all), these can advantageously be separated trench portions which are not continuous with the trench(es) surrounding the emitter/collector region(s).

The present invention concerns a monolithically merged trenched-and-implanted Bipolar Junction Transistor (TI-BJT) with antiparallel diode and a method of manufacturing the same. Trenches are made in a collector, base, emitter stack downto the collector. The base electrode is formed on an implanted base contact region at the bottom surface of the trench. The present invention also provides for products produced by the methods of the present invention and for apparatuses used to perform the methods of the present invention.

Three optimizations are provided for B-TRAN devices which include field plate trenches: 1) the trench dielectric thickness is large enough to withstand the base-to-emitter voltage, but thin enough to provide good electrical coupling between the poly field plate and the adjacent p-type silicon; 2) the base contact width is small enough to provide an acceptably low reverse base contact region pinch-off voltage, but large enough to avoid degradation of both base resistance; and 3) the emitter width is small enough to keep an acceptably high current density at the emitter's center.