A semiconductor device includes a semiconductor layer including an element region, and a termination region; a first electrode; a second electrode; a semi-insulating film located on the termination region; an insulating film located between the semiconductor layer and the semi-insulating film; and a protective film located on the semi-insulating film. The insulating film includes an inner perimeter portion, the inner perimeter portion being located between an end portion of the first electrode positioned at the termination region side and an end portion of the second semiconductor part positioned at the termination region side, an outer perimeter portion located between the second electrode and the semiconductor layer, and an intermediate portion located between the inner perimeter portion and the outer perimeter portion. A thickness of the intermediate portion is less than a thickness of the inner perimeter portion and a thickness of the outer perimeter portion.

According to one embodiment, a hydrogen concentration of a bottom part in a vicinity of a boundary with the insulating layer in the first silicon layer is higher than a hydrogen concentration of a part above the bottom part in the first silicon layer. And a resistivity of the bottom part in the first silicon layer is lower than a resistivity of the part above the bottom part in the first silicon layer.

A method can be used to make a semiconductor device. A number of projecting regions are formed over a first semiconductor layer that has a first conductivity type. The first semiconductor layer is located on an insulating layer that overlies a semiconductor substrate. The projecting regions are spaced apart from each other. Using the projecting regions as an implantation mask, dopants having a second conductivity type are implanted into the first semiconductor layer, so as to form a sequence of PN junctions forming diodes in the first semiconductor layer. The diodes vertically extend from an upper surface of the first semiconductor layer to the insulating layer.

A power semiconductor device is disclosed. The device includes a semiconductor body coupled to a first load terminal structure and a second load terminal structure, a first cell and a second cell. A first mesa is included in the first cell, the first mesa including: a first port region and a first channel region. A second mesa included in the second cell, the second mesa including a second port region. A third cell is electrically connected to the second load terminal structure and electrically connected to a drift region. The third cell includes a third mesa comprising: a third port region, a third channel region, and a third control electrode.

A semiconductor device includes a drift region of a first conductivity type, an anode region of a second conductivity type situated below the drift region, an inversion region of the second conductivity type situated above the drift region, an enhancement region of the first conductivity type situated between the drift region and the inversion region, first and second control trenches extending through the inversion region and the enhancement region into the drift region, each control trench being bordered by a cathode diffusion region of the first conductivity type, and a superjunction structure situated in the drift region between the first and the second control trenches so that the superjunction structure does not extend under either the first or the second control trench. The superjunction structure is separated from the inversion region by the enhancement region and includes alternating regions of the first and the second conductivity types.

A lateral insulated gate bipolar transistor (LIGBT) and method for eliminating the transistor tail current. The lateral insulated gate bipolar transistor comprises the silicon substrate, the buried oxide, and the drift region, the channel region, ohm-contact-high-doping region, the cathode, the gate dielectric, the anode contact, the gate, the cathode contact, the anode, which are placed above the silicon substrate, the electric field intensifier is placed at the upper surface of the drift region between the anode and the channel region to generate an electric field that starts from anode and points to the bottom surface of the electric field intensifier. The electric field intensifier is isolated from the drift region by the dielectric. The invention realizes performance improvements for both the conduction and the switching behaviors of the LIGBT device.

A semiconductor device includes: a semiconductor substrate having a drift layer; a base layer and a carrier storage layer over the drift layer; a collector layer on the drift layer opposite to the base layer; multiple trenches penetrating the base layer and the carrier storage layer and reaching the drift layer; a gate electrode on an insulation film in each trench; and an emitter region in a surface portion of the base layer contacting each trench. A thickness of at least a portion of a part of the gate insulation film on a sidewall of each trench on a collector layer side from a peak position, at which the impurity concentration of the carrier storage layer is highest, is thicker than a thickness of another part of the gate insulation film on the sidewall of an opening portion side of the trench from the peak position.

A semiconductor device includes a semiconductor body having first and second opposite sides, a drift region, a body layer at the second side, and a field-stop region in Ohmic connection with the body layer. A source metallization at the second side is in Ohmic connection with the body layer. A drain metallization at the first side is in Ohmic connection with the drift region. A gate electrode at the second side is electrically insulated from the semiconductor body to define an operable switchable channel region in the body layer. A through contact structure extends at least between the first and second sides, and includes a conductive region in Ohmic connection with the gate electrode and a dielectric layer. In a normal projection onto a horizontal plane substantially parallel to the first side, the field-stop region surrounds at least one of the drift region and the gate electrode.

In order to improve energization capacity, minority carrier injection efficiency is increased. In a semiconductor device, an IGBT includes a first drift layer, a collector region, a base region, an emitter region, an insulating film, a gate electrode, and a first high carrier lifetime region formed at a position closer to the collector region than the base region and having a longer carrier lifetime than the first drift layer. An FWD includes a second drift layer, an anode region, and a second high carrier lifetime region formed at a position closer to the anode region than a lower surface of the second drift layer and having a longer carrier lifetime than the second drift layer.

A semiconductor arrangement includes a first well formed to a first depth and a first width in a substrate and a second well formed to a second depth and a second width in the substrate. The first well is formed in the second well, the first depth is greater than the second depth, and the second width is greater than the first width. A source region is formed in the second well and a drain region is formed in the substrate.