A GaN-based power transistor including: a stack of layers in a vertical direction (z), the stack including, from an upper surface of the stack: a first AlGaN-based barrier), a GaN-based layer, and a second AlGaN-based barrier; and a gate pattern including: a metal gate, and a gate dielectric electrically insulating the metal gate from the stack, the metal gate being in contact with a bottom part and a wall part of the gate dielectric, the gate pattern passing through the first AlGaN-based barrier, then totally passing through the GaN-based layer and at least partially through the second AlGaN-based barrier, in the vertical direction (z), such that the second AlGaN-based barrier has a concentration of aluminium [Al]2 of less than or equal to 8% at.

The present disclosure provides a high electron mobility transistor (HEMT) including a substrate; a buffer layer over the substrate; a GaN layer over the buffer layer; a first AlGaN layer over the GaN layer; a first AlN layer over the first AlGaN layer; a p-type GaN layer over the first AlN layer; and a second AlN layer on the p-type GaN layer.

An indium phosphide substrate, the phosphide substrate has an angle θ on the main surface side of 0°<θ≤120° for all of the planes A, the indium phosphide substrate has edge rounds on the main surface side and a surface side opposite to the main surface; wherein a chamfered width X.sub.f from the wafer edge on the main surface side is 50 μm or more to 130 μm or less; wherein a chamfered width X.sub.b from the wafer edge on the surface side opposite to the main surface is 150 μm or more to 400 μm or less; and wherein the indium phosphide substrate has a thickness of 330 μm or moreto 700 μm or less.

A semiconductor structure includes a III-V compound layer, a first barrier layer, a second barrier layer, and an active layer. The III-V compound layer includes a first region, a second region, and a third region. The second region is sandwiched between the first region and the third region. The first barrier layer is sandwiched between the first region and the second region, and the second barrier layer is sandwiched between the second region and the third region. The III-V compound layer includes a first band gap, the first barrier layer includes a second band gap, and the second barrier layer includes a third band gap. The second band gap and the third band gap are greater than the first band gap.

A bidirectional switch element includes: a substrate; an Al.sub.zGa.sub.1-zN layer; an Al.sub.bGa.sub.1-bN layer; a first source electrode; a first gate electrode; a second gate electrode; a second source electrode; a p-type Al.sub.x1Ga.sub.1-x1N layer; a p-type Al.sub.x2Ga.sub.1-x2N layer; an Al.sub.yGa.sub.1-yN layer; and an Al.sub.wGa.sub.1-wN layer. The Al.sub.zGa.sub.1-zN layer is formed over the substrate. The Al.sub.bGa.sub.1-bN layer is formed on the Al.sub.zGa.sub.1-zN layer. The Al.sub.yGa.sub.1-yN layer is interposed between the substrate and the Al.sub.zGa.sub.1-zN layer. The Al.sub.wGa.sub.1-wN layer is interposed between the substrate and the Al.sub.yGa.sub.1-yN layer and has a higher C concentration than the Al.sub.yGa.sub.1-yN layer.

A method for controlling a concentration of donors in an Al-alloyed gallium oxide crystal structure includes implanting a Group IV element as a donor impurity into the crystal structure with an ion implantation process and annealing the implanted crystal structure to activate the Group IV element to form an electrically conductive region. The method may further include depositing one or more electrically conductive materials on at least a portion of the implanted crystal structure to form an ohmic contact. Examples of semiconductor devices are also disclosed and include a layer of an Al-alloyed gallium oxide crystal structure, at least one region including the crystal structure implanted with a Group IV element as a donor impurity with an ion implantation process and annealed to activate the Group IV element, an ohmic contact including one or more electrically conductive materials deposited on the at least one region.

An epitaxial structure of a GaN-based radio frequency device based on a Si substrate and a manufacturing method thereof are provided. The epitaxial structure is composed of a Si substrate (1), an AlN nucleation layer (2), AlGaN buffer layers (3, 4, 5), a GaN:Fe/GaN high-resistance layer (6), a GaN superlattice layer (7), a GaN channel layer (8), an AlGaN barrier layer (9) and a GaN cap layer (10) which are stacked in turn from bottom to top, wherein the GaN:Fe/GaN high-resistance layer (6) is composed of an intentional Fe-doped GaN layer and an unintentional doped GaN layer which are alternately connected; the GaN superlattice layer (7) is composed of a low-pressure/low V/III ratio GaN layer and a high-pressure/high V/III ratio GaN layer which are periodically and alternately connected.

A field effect transistor, comprising a gate contact and gate metal forming a vertical structure, such vertical structure having sides and a top surrounded by an air gap formed between a source electrode and a drain electrode of the field effect transistor.

According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, and a first compound member. A position of the third electrode is between a position of the second electrode and a position of the first electrode. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The fourth partial region is between the third and first partial regions. The fifth partial region is between the second and third partial regions. The second semiconductor layer includes first, second, and third semiconductor regions. The third semiconductor region is between the first partial region and the first electrode. The first compound member includes first compound portions between the third semiconductor region and the first electrode. A portion of the first electrode is between one of the first compound portions and an other one of the first compound portions.

A semiconductor structure includes: a channel layer; an active layer over the channel layer, wherein the active layer is configured to form a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer; a gate electrode over a top surface of the active layer; and a source/drain electrode over the top surface of the active layer; wherein the active layer includes a first layer and a second layer sequentially disposed therein from the top surface to a bottom surface of the active layer, and the first layer possesses a higher aluminum (Al) atom concentration compared to the second layer. An HEMT structure and an associated method are also disclosed.