A high electron mobility transistor (HEMT) includes a carrier transit layer, a carrier supply layer, a main gate, a control gate, a source electrode and a drain electrode. The carrier transit layer is on a substrate. The carrier supply layer is on the carrier transit layer. The main gate and the control gate are on the carrier supply layer. A fluoride ion doped region is formed right below the main gate in the carrier supply layer. The source electrode and the drain electrode are at two opposite sides of the main gate and the control gate, wherein the source electrode is electrically connected to the control gate by a metal interconnect. The present invention also provides a method of forming a high electron mobility transistor (HEMT).

In order to reduce costs as well as to effectively dissipate heat in certain RF circuits, a semiconductor device of the circuit can include one or more active devices such as transistors, diodes, and/or varactors formed of a first semiconductor material system integrated onto (e.g., bonded to) a base substrate formed of a second semiconductor material system that includes other circuit components. The first semiconductor material system can, for example, be the III-V or III-N semiconductor system, and the second semiconductor material system can, for example be silicon.

A method for making a multilayered device on an engineered substrate having a substrate coefficient of thermal expansion includes growing a buffer layer on the engineered substrate, and growing a first epitaxial layer on the buffer layer. The first epitaxial layer is characterized by an epitaxial coefficient of thermal expansion substantially equal to the substrate coefficient of thermal expansion.

An electronic circuit having a semiconductor device is provided that includes a heterostructure, the heterostructure including a first layer of a compound semiconductor to which a second layer of a compound semiconductor adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), wherein the 2-dimensional electron gas is not present. In aspects, an electronic circuit having a semiconductor device is provided that includes a III-V heterostructure, the III-V heterostructure including a first layer including GaN to which a second layer adjoins in order to form a channel for a 2-dimensional electron gas (2DEG), and having a purity such that the 2-dimensional electron gas is not present. It is therefore advantageous for the present electronic circuit to be enclosed such that, in operation, no light of wavelengths of less than 400 nm may reach the III-V heterostructure and free charge carriers may be generated by these wavelengths.

A compound semiconductor substrate and a method for manufacturing the same are provided to suppress surface roughness of a barrier layer while suppressing gate leak.

A method for manufacturing of a compound semiconductor substrate comprises a step forming an electronic traveling layer consisting of a first nitride semiconductor, a step forming a barrier layer consisting of a second nitride semiconductor with a wider band gap than a band gap of the first nitride semiconductor on the electronic traveling layer, and a step forming a cap layer with an organometallic vapor phase epitaxy on the barrier layer and in contact with the barrier layer. The cap layer has a C concentration of 5*10.sup.17 atoms/cm.sup.3 or more and 1*10.sup.20 atoms/cm.sup.3 or less, and consists of a nitride semiconductor. During the step forming the cap layer, source gas of the nitride semiconductor forming the cap layer and hydrocarbon gas are introduced to a top surface of the barrier layer.

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.

A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a group of negatively-charged ions, and a field plate. The gate electrode and the drain electrode disposed above the second nitride-based semiconductor layer to define a drift region therebetween. The group of negatively-charged ions are implanted into the drift region and spaced apart from an area directly beneath the gate and drain electrodes to form at least one high resistivity zone in the second nitride-based semiconductor layer. The field plate is disposed over the gate electrode and extends in a region between the gate electrode and the high resistivity zone.

A semiconductor device 1 has an electrode structure that includes source electrodes 3, a gate electrode 4, and drain electrodes 5 disposed on a semiconductor laminated structure 2 and extending in parallel to each other and in a predetermined first direction and a wiring structure that includes source wirings 9, drain wirings 10, and gate wirings 11 disposed on the electrode structure and extending in parallel to each other and in a second direction orthogonal to the first direction. The source wirings 9, the drain wirings 10, and the gate wirings 11 are electrically connected to the source electrodes 3, the drain electrodes 5, and the gate electrode 4, respectively. The semiconductor device 1 includes a conductive film 8 disposed between the gate electrode 4 and the drain wirings 10 and being electrically connected to the source electrodes 3.

A semiconductor device includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a source/drain pair, a fluorinated region, and a gate. The channel layer is disposed over the substrate. The barrier layer is disposed over the channel layer. The compound semiconductor layer is disposed over the barrier layer. The source/drain pair is disposed over the substrate, wherein the source and the drain are located on opposite sides of the compound semiconductor layer. The fluorinated region is disposed in the compound semiconductor layer. The gate is disposed on the compound semiconductor layer.

A High Electron Mobility Transistor structure having: a GaN buffer layer disposed on the substrate; a doped GaN layer disposed on, and in direct contact with, the buffer layer, such doped GaN layer being doped with more than one different dopants; an unintentionally doped (UID) GaN channel layer on, and in direct contact with, the doped GaN layer, such UID GaN channel layer having a 2DEG channel therein; a barrier layer on, and in direct contact with, the UID GaN channel layer. One of the dopants is beryllium and another one of the dopants is carbon.