A semiconductor device structure is provided. The semiconductor device structure includes a first channel structure and a second channel structure over a substrate. The semiconductor device structure also includes a first gate stack over the first channel structure, and the first gate stack has a first width. The semiconductor device structure further includes a second gate stack over the second channel structure. The second gate stack has a protruding portion extending away from the second channel structures. The protruding portion of the second gate stack has a second width, and half of the first width is greater than the second width.

A semiconductor device includes a fin structure disposed over a substrate. The semiconductor device includes a first interfacial layer straddling the fin structure. The semiconductor device includes a gate dielectric layer extending along sidewalls of the fin structure. The semiconductor device includes a second interfacial layer overlaying a top surface of the fin structure. The semiconductor device includes a gate structure straddling the fin structure. The first interfacial layer and the gate dielectric layer are disposed between the sidewalls of the fin structure and the gate structure.

FinFET spacer formation includes, for example, providing an intermediate semiconductor structure having a substrate having one or more fin having a first and a second plurality of gates disposed thereon, and a first plurality of spacers disposed on sides of the first and second plurality of gates, depositing a first liner on the structure, depositing a fill material at a level along inner portions of the first liner between the gates adjacent to the one or more fin, removing outer portions of the first spacers and the first liner away from the fill material, the remaining portions of the first spacers and the first liner defining a first thickness, and depositing a second liner having a second thickness over the gates and over the remaining portions of the first spacers and the first liner, and the fill material, and wherein the first thickness is greater than the second thickness.

In accordance with some embodiments, a source/drain contact is formed by exposing a source/drain region through a first dielectric layer and a second dielectric layer. The second dielectric layer is recessed under the first dielectric layer, and a silicide region is formed on the source/drain region, wherein the silicide region has an expanded width.

Disclosed is a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) with a replacement metal gate (RMG) structure that includes a first section, which traverses a semiconductor body at a channel region in a first-type well, and a second section, which is adjacent to the first section and which traverses the semiconductor body at a drain drift region in a second-type well. The RMG structure includes, in both sections, a first-type work function layer and a second-type work function layer on the first-type work function layer. However, the thickness of the first-type work function layer in the first section is greater than the thickness in the second section such that the RMG structure is asymmetric. Thus, threshold voltage (Vt) at the first section is greater than Vt at the second section and the LDMOSFET has a relatively high breakdown voltage (BV). Also disclosed are methods for forming the LDMOSFET.

A FinFET whose fin has an upper portion doped with a first conductivity type and a lower portion doped with a second conductivity type, and the junction between the upper portion and the lower portion acts as a diode. The FinFET further includes: at least one layer of high-k dielectric material (for example Si.sub.3N.sub.4) adjacent at least one side of the fin for redistributing a potential drop more evenly over the diode. Examples of the k value for the high-k dielectric material are k≧5, k≧7.5, and k≧20.

A method for fabricating a semiconductor device includes: forming a gate structure including a source side and a drain side over a substrate, wherein a dielectric material and a columnar crystal grain material are stacked over the substrate; doping a chemical species on the drain side of the gate structure; and exposing the gate structure doped with the chemical species to a re-growth process in order to thicken the dielectric material on the drain side of the gate structure.

A semiconductor device and a method of manufacturing a semiconductor device, the device including a first semiconductor pattern on a substrate, the first semiconductor pattern including a lower channel; a second semiconductor pattern on the first semiconductor pattern and spaced apart from the first semiconductor pattern in a vertical direction, the second semiconductor pattern including an upper channel extending in the vertical direction; a gate electrode covering the lower channel and surrounding the upper channel; and source/drain patterns on opposite sides of the upper channel, wherein the substrate and the first semiconductor pattern have a doping concentration of 10.sup.19/cm.sup.3 or less.

Various embodiments include methods and integrated circuit structures. In some cases, a method of forming an integrated circuit structure can include: forming a mask over an oxide layer and an underlying set of fin structures, the set of fin structures including a plurality of fins each having a substrate base and a silicide layer over the substrate base; implanting the oxide layer through an opening in the mask; removing the mask; polishing the oxide layer overlying the set of fin structures after removing the mask to expose the set of fin structures; and forming a nitride layer over the set of fin structures.

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure. The gate stack includes a first portion and a second portion adjacent to the fin structure, and the first portion is wider than the second portion.