H01L2224/29023

LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREFOR

In a light emitting device, in a bottom surface of a cavity of a Si substrate, slit-shaped through holes and through electrodes that fill the through holes are provided at a position facing a first element electrode of a light emitting element. A length of an upper surface of the through electrode in a long axis direction is larger than a height of the through electrode in a thickness direction of the Si substrate. A joining layer having a shape corresponding to a shape of the upper surface of the through electrode is disposed between the first element electrode of the light emitting element and the upper surface of the through electrode facing the first element electrode. The entire upper surface of the through electrode is joined to the first element electrode via the joining layer.

Power semiconductor device and manufacturing method for power semiconductor device

A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.

Mass transfer method for light-emitting unit, array substrate, and display device with electro-curable adhesive
11322485 · 2022-05-03 · ·

The present disclosure relates to the field of display, specifically, to a mass transfer method for a light-emitting unit, an array substrate, and a display device. The method comprises: providing a plurality of light-emitting units in an array, wherein each light-emitting unit comprises a first electrode extending to a side edge of the light-emitting unit; providing a base substrate comprising a plurality of areas in an array, each area comprising a second electrode and an electro-curable adhesive thereon; picking up the light-emitting units by a transfer device; applying voltages to the first and second electrodes respectively; aligning the transfer device with the base substrate, such that a portion of each first electrode extending to the side edge of the light-emitting unit contacts a respective electro-curable adhesive; and separating the transfer device from the light-emitting units, such that each light-emitting unit is transferred to a respective area of the base substrate.

METHOD FOR MANUFACTURING COLOR MICRO LED DISPLAY CHIP MODULE
20230246060 · 2023-08-03 ·

The present disclosure discloses a method for manufacturing a color Micro LED display chip module, comprising preparing a Micro LED chip on a substrate, grinding and cutting the chip and then flip-bonding same on a driving basal plate, and peeling the substrate from the chip. Through fabricating a quantum dot hole site corresponding to a sub-pixel unit position of a chip on a transparent basal plate and filling a quantum dot light-color converter in the quantum dot hole site and depositing a quantum dot protective layer, a conversion device is fabricated independently on the transparent basal plate. Compared with processing a conversion layer on a substrate layer in the prior art, inverting a full-color quantum dot conversion device and then aligning and bonding same with the integrated monochrome Micro LED module base can improve the fabrication efficiency, eliminate the crosstalk between light and color in full-color Micro LED display.

Processes for adjusting dimensions of dielectric bond line materials and related films, articles and assemblies

Processes for adjusting dimensions of dielectric bond line materials in stacks of microelectronic components to prevent extrusion of the dielectric bond line materials beyond component peripheries during thermocompression bonding by patterning the materials with boundary portions inset from component peripheries, or employing an inset dielectric material surrounded by another solidified dielectric material. Related material films, articles and assemblies are also disclosed.

METHOD OF FORMING SEMICONDUCTOR STRUCTURE

The present invention relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first substrate, and a bonding layer located on a surface of the first substrate. The material of the first bonding layer is a dielectric material containing element carbon (C). C atomic concentration of a surface layer of the first bonding layer away from the first substrate is higher than or equal to 35%. The first bonding layer of the semiconductor structure may be used to enhance bonding strength during bonding.

Three-dimensional semiconductor package with partially overlapping chips and manufacturing method thereof

The present application provides a semiconductor package and a manufacturing method thereof. The semiconductor package includes a first device, first electrical connectors, a second device and second electrical connectors. The first device is attached to a package substrate. An active side of the first device die faces toward the package substrate. The first electrical connectors connect the active side of the first device die to the package substrate. The second device die is stacked over the first device die. An active side of the second device die faces toward the package substrate. A portion of the active side of the second device die is outside an area that overlaps the first device die. The second electrical connectors connect the portion of the active side of the second device die to the package substrate.

Method of forming semiconductor structure

A method of forming a semiconductor structure includes following steps. A first wafer is bonded to a second wafer, in which the first wafer includes a first substrate and a first conductive pad above a first surface of the first substrate, and the second wafer comprises a second substrate and a second conductive pad above a second surface of the second substrate. A mask layer is formed above the first substrate. The mask layer and the first substrate are etched to form a first opening in the first substrate. A sacrificial spacer is formed in the first substrate at a sidewall of the first opening. The first conductive pad is etched to form a second opening communicated to the first opening. A conductive material is filled in the first opening and the second opening to form a conductive structure interconnecting the first and second conductive pads.

LIGHT EMITTING MODULE AND METHOD OF MANUFACTURING SAME
20230387373 · 2023-11-30 · ·

A method of manufacturing a light emitting module includes: providing an intermediate structure that includes a wiring board having an upper surface and including a metal layer, a first conducting member on the metal layer, and a second conducting member on the metal layer; disposing, on the intermediate structure, a resist layer having openings; providing a light emitting element including a first electrode and a second electrode, and disposing the light emitting element on the resist layer such that the first electrode and the second electrode respectively face the first conducting member and the second conducting member while a portion of an outer periphery of the lower surface of the light emitting element is exposed from the resist layer in the openings; forming a first bonding member on the first conducting member and forming a second bonding member on the second conducting member; and removing the resist layer.

POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR POWER SEMICONDUCTOR DEVICE

A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.