H01L2224/29024

Package structure comprising thermally conductive layer around the IC die

A package structure and a manufacturing method thereof are provided. The package structure includes a carrier substrate, an integrated circuit (IC) die thermally coupled to the carrier substrate through a thermally conductive layer, an antenna pattern disposed over the carrier substrate and the IC die, a redistribution structure disposed between the antenna pattern and the IC die, and an underfill disposed below and thermally coupled to the carrier substrate. The antenna pattern is electrically coupled to the IC die.

PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

A manufacturing method of a package structure includes: providing a carrier substrate with an integrated circuit (IC) die, where the IC die is disposed in a cavity of the carrier substrate, and a thermally conductive layer is formed in the cavity to separate the IC die from the carrier substrate; forming a redistribution structure on a first side of the carrier substrate, where the redistribution structure is electrically coupled to the IC die; forming an antenna pattern over the redistribution structure; forming a patterned dielectric layer with an opening on a second side of the carrier substrate opposite to the first side, where a portion of the second side of the carrier substrate is exposed by the opening; and forming an underfill to be in thermal contact with the carrier substrate, where the underfill extends outward beyond an edge of the carrier substrate.

ELECTRONIC SYSTEM HAVING INCREASED COUPLING BY USING HORIZONTAL AND VERTICAL COMMUNICATION CHANNELS
20180130784 · 2018-05-10 · ·

An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

ELECTRONIC SYSTEM HAVING INCREASED COUPLING BY USING HORIZONTAL AND VERTICAL COMMUNICATION CHANNELS
20180102353 · 2018-04-12 · ·

An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

Electronic system having increased coupling by using horizontal and vertical communication channels
09881911 · 2018-01-30 · ·

An embodiment of an electronic system may be provided so as to have superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in PCBs coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.

OPTOELECTRONIC SOLID STATE ARRAY

Structures and methods are disclosed for fabricating optoelectronic solid state array devices. In one case a backplane and array of micro devices is aligned and connected through bumps.

SEMICONDUCTOR PACKAGE AND WIRING SUBSTRATE INCLUDED IN THE SAME
20250062244 · 2025-02-20 ·

A semiconductor package according to an embodiment includes a semiconductor chip, and a redistribution portion electrically connected to the semiconductor chip. The redistribution portion includes an inner insulation layer, an interconnection pad, and an outer insulation layer. The interconnection pad is on the inner insulation layer and includes a first region and a second region outside the first region and having an opening. The outer insulation layer includes a first portion on the second region of the interconnection pad and a second portion filling at least a part of the opening.

Electronic device, and manufacturing method of electronic device

An electronic device includes a drive substrate (a pressure chamber substrate and a vibration plate) including a piezoelectric element and electrode wirings related to driving of the piezoelectric element formed thereon, and a sealing plate bonded thereto, the electrode wirings are made of wiring metal containing gold (Au) on the drive substrate through an adhesion layer which is a base layer, and has a removed portion in which a portion of the wiring metal in a region containing a part bonded to a bonding resin is removed and the adhesion layer is exposed.

Semiconductor structure and method of forming the same

A first polymer layer is formed across a package region and a test region. A first metal pattern is formed in the package region and a first test pattern is simultaneously formed in the test region. The first metal pattern has an upper portion located on the first polymer layer and a lower portion penetrating through the first polymer layer, and the first test pattern is located on the first polymer layer and has a first opening exposing the first polymer layer. A second polymer layer is formed on the first metal pattern in the package region and a second test pattern is simultaneously formed on the first test pattern in the test region. The second polymer layer has a second opening exposing the upper portion of the first metal pattern, and the second test pattern has a third opening greater than the first opening of the first test pattern.