A highly reliable bonded structure having excellent thermal fatigue resistance characteristics and thermal stress relaxation characteristics is provided. The bonded structure of the present invention comprises a first member, a second member capable of being bonded to the first member, and a bonding part interposed between a first bond surface at the first member side and a second bond surface at the second member side to bond the first member and the second member. The bonding part has at least a bonding layer, a reinforcing layer, and an intermediate layer. The bonding layer is composed of an intermetallic compound and bonded to the first bond surface.

A method of forming a semiconductor package. Implementations include forming on a die backside an intermediate metal layer having multiple sublayers, each including a metal selected from the group consisting of titanium, nickel, copper, silver, and combinations thereof. A tin layer is deposited onto the intermediate metal layer and is then reflowed with a silver layer of a substrate to form an intermetallic layer having a melting temperature above 260 degrees Celsius and including an intermetallic consisting of silver and tin and/or an intermetallic consisting of copper and tin. Another method of forming a semiconductor package includes forming a bump on each of a plurality of exposed pads of a top side of a die, each exposed pad surrounded by a passivation layer, each bump including an intermediate metal layer as described above and a tin layer coupled to the intermediate metal layer is reflowed to form an intermetallic layer.

A semiconductor structure is disclosed, including a substrate, an insulating layer on the substrate, a barrier layer on the insulating layer, a bonding dielectric layer on the barrier layer, and a bonding pad extending through the insulating layer, the barrier layer and the bonding dielectric layer. A top surface of the bonding pad exposed from the bonding dielectric layer for bonding to another bonding pad on another substrate. A liner on a bottom surface of the bonding pad directly contacts the substrate.

A semiconductor structure is disclosed, including a substrate, an insulating layer on the substrate, a barrier layer on the insulating layer, a bonding dielectric layer on the barrier layer, and a bonding pad extending through the insulating layer, the barrier layer and the bonding dielectric layer. A top surface of the bonding pad exposed from the bonding dielectric layer for bonding to another bonding pad on another substrate. A liner on a bottom surface of the bonding pad directly contacts the substrate.

There is provided an imaging device, an electronic apparatus including an imaging device, and an automotive vehicle including an electronic apparatus including an imaging device, including: a first substrate including a first set of photoelectric conversion units; a second substrate including a second set of photoelectric conversion units; and an insulating layer between the first substrate and the second substrate; where the insulating layer has a capability to reflect a first wavelength range of light and transmit a second wavelength range of light that is longer than the first wavelength range of light.

A power semiconductor device is proposed. The power semiconductor device includes a semiconductor substrate. The power semiconductor device further includes an electrically conducting first layer. At least part of the electrically conducting first layer includes pores. The power semiconductor device further includes an electrically conducting second layer. The electrically conducting second layer is arranged between the semiconductor substrate and the electrically conducting first layer. The pores are at least partially filled with a phase change material.

A multilayer composite bonding material for transient liquid phase bonding a semiconductor device to a metal substrate includes thermal stress compensation layers sandwiched between a pair of bonding layers. The thermal stress compensation layers may include a core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness such that a graded stiffness extends across a thickness of the thermal stress compensation layers. The thermal stress compensation layers have a melting point above a sintering temperature and the bonding layers have a melting point below the sintering temperature. The graded stiffness across the thickness of the thermal stress compensation layers compensates for thermal contraction mismatch between the semiconductor device and the metal substrate during cooling from the sintering temperature to ambient temperature.

A device includes: a chip; a support member; an adhesive layer disposed on the support member; and a wire electrically connected to the sensor chip on a side face of the sensor chip. Herein the adhesive layer includes a material exhibiting a dilatancy property in which a shear stress increases in a multi-dimensional function as a shear rate increases.

Embodiments of the present disclosure include a method of forming an electronic assembly with a mesh bond layer. The method may include forming a mesh bond material comprising a first surface spaced apart from a second surface by a thickness of the mesh bond material and one or more openings extending from the first surface through the thickness of the mesh bond material to the second surface. The method may further include adjusting at least one of: the thickness of the mesh bond material, a geometry of the one or more openings, or a size of the one or more openings of the mesh bond material, where the adjusting modifies a Young's modulus of the mesh bond material, and bonding the first surface of the mesh bond material to a surface of a semiconductor device.

A method for the production of a silver sintering agent in the form of a layer-shaped silver sintering body having silver oxide surfaces and the use thereof are provided.