Techniques for integrating two-phase cooling into a microprocessor chip package lid are provided. In one aspect, a vapor chamber lid device includes: an evaporator plate; a condenser plate attached to the evaporator plate such that a cavity is formed between the evaporator plate and the condenser plate; a thermal insulation layer sandwiched between the evaporator plate and the condenser plate; and a working fluid enclosed within the cavity, wherein the working fluid partially fills the cavity. At least one heat-dissipating device can be placed in thermal contact with the evaporator plate via a thermal interface material. A method is also provided for forming the vapor chamber lid device.

Techniques for integrating two-phase cooling into a microprocessor chip package lid are provided. In one aspect, a vapor chamber lid device includes: an evaporator plate; a condenser plate attached to the evaporator plate such that a cavity is formed between the evaporator plate and the condenser plate; a thermal insulation layer sandwiched between the evaporator plate and the condenser plate; and a working fluid enclosed within the cavity, wherein the working fluid partially fills the cavity. At least one heat-dissipating device can be placed in thermal contact with the evaporator plate via a thermal interface material. A method is also provided for forming the vapor chamber lid device.

A package structure includes a semiconductor package, a thermal conductive gel, a thermal conductive film and a heat spreader. The thermal conductive gel is disposed over the semiconductor package. The thermal conductive film is disposed over the semiconductor package and the thermal conductive gel. A thermal conductivity of the thermal conductive film is different from a thermal conductivity of the thermal conductive gel. The thermal conductive film is surrounded by the heat spreader.

A package structure includes a semiconductor package, a thermal conductive gel, a thermal conductive film and a heat spreader. The thermal conductive gel is disposed over the semiconductor package. The thermal conductive film is disposed over the semiconductor package and the thermal conductive gel. A thermal conductivity of the thermal conductive film is different from a thermal conductivity of the thermal conductive gel. The thermal conductive film is surrounded by the heat spreader.

A semiconductor package includes a base structure having a base pad, a first semiconductor chip on the base structure, and having a first connection pad bonded to the base pad, a first bonding structure including an base insulation layer of a base structure and a first lower insulation layer of the first semiconductor chip bonded to the base insulation layer, a second semiconductor chip on the first semiconductor chip, and having a second connection pad connected to the first through-electrode, and a second bonding structure including a first upper insulation layer of the first semiconductor chip, and a second lower insulation layer of the second semiconductor chip bonded to the first upper insulation layer, and the first upper insulation layer has a dummy insulation portion extending onto the base structure around the first semiconductor chip.

A semiconductor package includes a substrate, an electronic component mounted on an upper surface of the substrate so that a lower surface of the electronic component faces the upper surface of the substrate, a heat slug disposed on an upper surface of the electronic component so that a lower surface of the heat slug faces the upper surface of the electronic component, a bonding material bonding the heat slug to the upper surface of the electronic component, and an encapsulant in which the heat slug and the electronic component are embedded. A side surface of the heat slug extending between an edge of the lower surface of the heat slug and an edge of an upper surface of the heat slug forms a recess with the upper surface of the electronic component.

A semiconductor package includes a substrate, an electronic component mounted on an upper surface of the substrate so that a lower surface of the electronic component faces the upper surface of the substrate, a heat slug disposed on an upper surface of the electronic component so that a lower surface of the heat slug faces the upper surface of the electronic component, a bonding material bonding the heat slug to the upper surface of the electronic component, and an encapsulant in which the heat slug and the electronic component are embedded. A side surface of the heat slug extending between an edge of the lower surface of the heat slug and an edge of an upper surface of the heat slug forms a recess with the upper surface of the electronic component.

An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.

A method including stacking a number of silicon dice such that one or more edges of the dice are in vertical alignment, where the one or more edges include a number of connection pads. The method also includes positioning a connecting wire on a substantially perpendicular axis to the one or more edges. The connecting wire includes a number of solder blocks formed thereon. The solder blocks are spaced at intervals associated with a distance between a first set of aligned connection pads on the dice. The connecting wire is positioned such that the solder blocks are in contact with the first set of aligned connection pads. The method also includes applying heat to cause the solder blocks to reflow and physically and electrically couple the connecting wire to the connection pads.

A method including stacking a number of silicon dice such that one or more edges of the dice are in vertical alignment, where the one or more edges include a number of connection pads. The method also includes positioning a connecting wire on a substantially perpendicular axis to the one or more edges. The connecting wire includes a number of solder blocks formed thereon. The solder blocks are spaced at intervals associated with a distance between a first set of aligned connection pads on the dice. The connecting wire is positioned such that the solder blocks are in contact with the first set of aligned connection pads. The method also includes applying heat to cause the solder blocks to reflow and physically and electrically couple the connecting wire to the connection pads.